ARM: sun7i: Add audio PLL
The A20 uses the PLL2 as the audio PLL, which is the parent of all the other audio clocks in the system (i2s, codec, etc.). Add it to the DTSI. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
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@ -199,6 +199,15 @@ pll1: clk@01c20000 {
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clock-output-names = "pll1";
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};
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pll2: clk@01c20008 {
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#clock-cells = <1>;
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compatible = "allwinner,sun4i-a10-pll2-clk";
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reg = <0x01c20008 0x8>;
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clocks = <&osc24M>;
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clock-output-names = "pll2-1x", "pll2-2x",
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"pll2-4x", "pll2-8x";
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};
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pll4: clk@01c20018 {
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#clock-cells = <0>;
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compatible = "allwinner,sun7i-a20-pll4-clk";
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