Merge commit '702b691e4a71' into next/dt
Merging in Samsung fixes for 3.15-rc to avoid an annoying context conflict with new DT code. * commit '702b691e4a71': ARM: dts: Remove g2d_pd node for exynos5420 ARM: dts: Remove mau_pd node for exynos5420 ARM: exynos_defconfig: enable HS-I2C to fix for mmc partition mount ARM: dts: disable MDMA1 node for exynos5420 ARM: EXYNOS: fix the secondary CPU boot of exynos4212 Signed-off-by: Olof Johansson <olof@lixom.net>
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commit
89f6dfaceb
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@ -364,16 +364,4 @@ wakeup {
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gpio-key,wakeup;
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};
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};
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amba {
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mdma1: mdma@11C10000 {
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/*
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* MDMA1 can support both secure and non-secure
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* AXI transactions. When this is enabled in the kernel
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* for boards that run in secure mode, we are getting
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* imprecise external aborts causing the kernel to oops.
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*/
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status = "disabled";
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};
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};
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};
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@ -219,16 +219,6 @@ disp_pd: power-domain@100440C0 {
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reg = <0x100440C0 0x20>;
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};
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mau_pd: power-domain@100440E0 {
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compatible = "samsung,exynos4210-pd";
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reg = <0x100440E0 0x20>;
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};
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g2d_pd: power-domain@10044100 {
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compatible = "samsung,exynos4210-pd";
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reg = <0x10044100 0x20>;
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};
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msc_pd: power-domain@10044120 {
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compatible = "samsung,exynos4210-pd";
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reg = <0x10044120 0x20>;
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@ -336,6 +326,13 @@ mdma1: mdma@11C10000 {
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#dma-cells = <1>;
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#dma-channels = <8>;
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#dma-requests = <1>;
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/*
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* MDMA1 can support both secure and non-secure
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* AXI transactions. When this is enabled in the kernel
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* for boards that run in secure mode, we are getting
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* imprecise external aborts causing the kernel to oops.
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*/
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status = "disabled";
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};
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};
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@ -730,6 +727,5 @@ sss@10830000 {
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interrupts = <0 112 0>;
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clocks = <&clock 471>;
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clock-names = "secss";
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samsung,power-domain = <&g2d_pd>;
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};
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};
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@ -65,6 +65,7 @@ CONFIG_TCG_TIS_I2C_INFINEON=y
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CONFIG_I2C=y
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CONFIG_I2C_MUX=y
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CONFIG_I2C_ARB_GPIO_CHALLENGE=y
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CONFIG_I2C_EXYNOS5=y
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CONFIG_I2C_S3C2410=y
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CONFIG_DEBUG_GPIO=y
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# CONFIG_HWMON is not set
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@ -18,6 +18,8 @@
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#include <mach/map.h>
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#include <plat/cpu.h>
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#include "smc.h"
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static int exynos_do_idle(void)
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@ -28,13 +30,24 @@ static int exynos_do_idle(void)
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static int exynos_cpu_boot(int cpu)
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{
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/*
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* The second parameter of SMC_CMD_CPU1BOOT command means CPU id.
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* But, Exynos4212 has only one secondary CPU so second parameter
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* isn't used for informing secure firmware about CPU id.
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*/
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if (soc_is_exynos4212())
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cpu = 0;
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exynos_smc(SMC_CMD_CPU1BOOT, cpu, 0, 0);
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return 0;
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}
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static int exynos_set_cpu_boot_addr(int cpu, unsigned long boot_addr)
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{
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void __iomem *boot_reg = S5P_VA_SYSRAM_NS + 0x1c + 4*cpu;
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void __iomem *boot_reg = S5P_VA_SYSRAM_NS + 0x1c;
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if (!soc_is_exynos4212())
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boot_reg += 4*cpu;
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__raw_writel(boot_addr, boot_reg);
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return 0;
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