clk: ti: Fix some errors found by static checkers
drivers/clk/ti/clk-814x.c:34:12: warning: symbol 'dm814x_adpll_early_init' was not declared. Should it be static? drivers/clk/ti/clk-814x.c:58:12: warning: symbol 'dm814x_adpll_enable_init_clocks' was not declared. Should it be static? drivers/clk/ti/adpll.c:465 ti_adpll_recalc_rate() warn: should '__readw(d->regs + 20) << 18' be a 64 bit type? drivers/clk/ti/adpll.c:945 ti_adpll_probe() error: we previously assumed 'd->clocks' could be null (see line 921) The last one looks like a real bug because we don't return an error on allocation failure. Cc: Tero Kristo <t-kristo@ti.com> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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@ -462,7 +462,7 @@ static unsigned long ti_adpll_recalc_rate(struct clk_hw *hw,
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spin_lock_irqsave(&d->lock, flags);
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spin_lock_irqsave(&d->lock, flags);
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frac_m = readl_relaxed(d->regs + ADPLL_FRACDIV_OFFSET);
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frac_m = readl_relaxed(d->regs + ADPLL_FRACDIV_OFFSET);
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frac_m &= ADPLL_FRACDIV_FRACTIONALM_MASK;
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frac_m &= ADPLL_FRACDIV_FRACTIONALM_MASK;
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rate = readw_relaxed(d->regs + ADPLL_MN2DIV_OFFSET) << 18;
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rate = (u64)readw_relaxed(d->regs + ADPLL_MN2DIV_OFFSET) << 18;
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rate += frac_m;
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rate += frac_m;
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rate *= parent_rate;
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rate *= parent_rate;
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divider = (readw_relaxed(d->regs + ADPLL_M2NDIV_OFFSET) + 1) << 18;
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divider = (readw_relaxed(d->regs + ADPLL_M2NDIV_OFFSET) + 1) << 18;
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@ -919,7 +919,7 @@ static int ti_adpll_probe(struct platform_device *pdev)
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TI_ADPLL_NR_CLOCKS,
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TI_ADPLL_NR_CLOCKS,
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GFP_KERNEL);
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GFP_KERNEL);
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if (!d->clocks)
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if (!d->clocks)
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goto free;
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return -ENOMEM;
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err = ti_adpll_init_dco(d);
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err = ti_adpll_init_dco(d);
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if (err) {
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if (err) {
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@ -31,7 +31,7 @@ static struct ti_dt_clk dm814_clks[] = {
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static bool timer_clocks_initialized;
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static bool timer_clocks_initialized;
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int __init dm814x_adpll_early_init(void)
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static int __init dm814x_adpll_early_init(void)
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{
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{
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struct device_node *np;
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struct device_node *np;
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@ -55,7 +55,7 @@ static const char * const init_clocks[] = {
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"pll290clkout", /* DDR 481c5290.adpll.clkout */
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"pll290clkout", /* DDR 481c5290.adpll.clkout */
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};
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};
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int __init dm814x_adpll_enable_init_clocks(void)
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static int __init dm814x_adpll_enable_init_clocks(void)
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{
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{
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int i, err;
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int i, err;
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