Merge remote-tracking branches 'spi/topic/coldfire' and 'spi/topic/dw' into spi-next
This commit is contained in:
Mark Brown
commit
8a9e77653f
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@ -420,19 +420,20 @@ static int mcfqspi_probe(struct platform_device *pdev)
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master->auto_runtime_pm = true;
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platform_set_drvdata(pdev, master);
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pm_runtime_enable(&pdev->dev);
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status = devm_spi_register_master(&pdev->dev, master);
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if (status) {
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dev_dbg(&pdev->dev, "spi_register_master failed\n");
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goto fail2;
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}
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pm_runtime_enable(&pdev->dev);
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dev_info(&pdev->dev, "Coldfire QSPI bus driver\n");
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return 0;
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fail2:
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pm_runtime_disable(&pdev->dev);
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mcfqspi_cs_teardown(mcfqspi);
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fail1:
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clk_disable(mcfqspi->clk);
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@ -19,6 +19,7 @@
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#include <linux/of.h>
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#include <linux/of_gpio.h>
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#include <linux/of_platform.h>
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#include <linux/property.h>
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#include "spi-dw.h"
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@ -74,13 +75,11 @@ static int dw_spi_mmio_probe(struct platform_device *pdev)
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dws->max_freq = clk_get_rate(dwsmmio->clk);
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of_property_read_u32(pdev->dev.of_node, "reg-io-width",
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&dws->reg_io_width);
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device_property_read_u32(&pdev->dev, "reg-io-width", &dws->reg_io_width);
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num_cs = 4;
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if (pdev->dev.of_node)
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of_property_read_u32(pdev->dev.of_node, "num-cs", &num_cs);
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device_property_read_u32(&pdev->dev, "num-cs", &num_cs);
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dws->num_cs = num_cs;
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@ -23,11 +23,6 @@
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#define DRIVER_NAME "dw_spi_pci"
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struct dw_spi_pci {
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struct pci_dev *pdev;
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struct dw_spi dws;
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};
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struct spi_pci_desc {
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int (*setup)(struct dw_spi *);
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u16 num_cs;
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@ -48,7 +43,6 @@ static struct spi_pci_desc spi_pci_mid_desc_2 = {
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static int spi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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{
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struct dw_spi_pci *dwpci;
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struct dw_spi *dws;
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struct spi_pci_desc *desc = (struct spi_pci_desc *)ent->driver_data;
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int pci_bar = 0;
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@ -58,14 +52,10 @@ static int spi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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if (ret)
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return ret;
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dwpci = devm_kzalloc(&pdev->dev, sizeof(struct dw_spi_pci),
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GFP_KERNEL);
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if (!dwpci)
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dws = devm_kzalloc(&pdev->dev, sizeof(*dws), GFP_KERNEL);
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if (!dws)
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return -ENOMEM;
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dwpci->pdev = pdev;
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dws = &dwpci->dws;
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/* Get basic io resource and map it */
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dws->paddr = pci_resource_start(pdev, pci_bar);
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@ -74,7 +64,6 @@ static int spi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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return ret;
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dws->regs = pcim_iomap_table(pdev)[pci_bar];
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dws->irq = pdev->irq;
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/*
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@ -99,7 +88,7 @@ static int spi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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return ret;
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/* PCI hook and SPI hook use the same drv data */
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pci_set_drvdata(pdev, dwpci);
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pci_set_drvdata(pdev, dws);
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dev_info(&pdev->dev, "found PCI SPI controller(ID: %04x:%04x)\n",
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pdev->vendor, pdev->device);
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@ -109,26 +98,26 @@ static int spi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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static void spi_pci_remove(struct pci_dev *pdev)
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{
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struct dw_spi_pci *dwpci = pci_get_drvdata(pdev);
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struct dw_spi *dws = pci_get_drvdata(pdev);
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dw_spi_remove_host(&dwpci->dws);
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dw_spi_remove_host(dws);
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}
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#ifdef CONFIG_PM_SLEEP
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static int spi_suspend(struct device *dev)
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{
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struct pci_dev *pdev = to_pci_dev(dev);
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struct dw_spi_pci *dwpci = pci_get_drvdata(pdev);
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struct dw_spi *dws = pci_get_drvdata(pdev);
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return dw_spi_suspend_host(&dwpci->dws);
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return dw_spi_suspend_host(dws);
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}
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static int spi_resume(struct device *dev)
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{
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struct pci_dev *pdev = to_pci_dev(dev);
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struct dw_spi_pci *dwpci = pci_get_drvdata(pdev);
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struct dw_spi *dws = pci_get_drvdata(pdev);
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return dw_spi_resume_host(&dwpci->dws);
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return dw_spi_resume_host(dws);
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}
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#endif
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@ -30,19 +30,13 @@
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/* Slave spi_dev related */
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struct chip_data {
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u16 cr0;
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u8 cs; /* chip select pin */
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u8 n_bytes; /* current is a 1/2/4 byte op */
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u8 tmode; /* TR/TO/RO/EEPROM */
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u8 type; /* SPI/SSP/MicroWire */
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u8 poll_mode; /* 1 means use poll mode */
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u32 dma_width;
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u32 rx_threshold;
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u32 tx_threshold;
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u8 enable_dma;
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u8 bits_per_word;
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u16 clk_div; /* baud rate divider */
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u32 speed_hz; /* baud rate */
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void (*cs_control)(u32 command);
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@ -289,14 +283,11 @@ static int dw_spi_transfer_one(struct spi_master *master,
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struct chip_data *chip = spi_get_ctldata(spi);
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u8 imask = 0;
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u16 txlevel = 0;
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u16 clk_div = 0;
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u32 speed = 0;
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u32 cr0 = 0;
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u16 clk_div;
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u32 cr0;
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int ret;
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dws->dma_mapped = 0;
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dws->n_bytes = chip->n_bytes;
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dws->dma_width = chip->dma_width;
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dws->tx = (void *)transfer->tx_buf;
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dws->tx_end = dws->tx + transfer->len;
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@ -306,37 +297,30 @@ static int dw_spi_transfer_one(struct spi_master *master,
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spi_enable_chip(dws, 0);
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cr0 = chip->cr0;
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/* Handle per transfer options for bpw and speed */
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if (transfer->speed_hz) {
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speed = chip->speed_hz;
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if (transfer->speed_hz != chip->speed_hz) {
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/* clk_div doesn't support odd number */
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clk_div = (dws->max_freq / transfer->speed_hz + 1) & 0xfffe;
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if ((transfer->speed_hz != speed) || !chip->clk_div) {
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speed = transfer->speed_hz;
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chip->speed_hz = transfer->speed_hz;
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chip->clk_div = clk_div;
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/* clk_div doesn't support odd number */
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clk_div = (dws->max_freq / speed + 1) & 0xfffe;
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chip->speed_hz = speed;
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chip->clk_div = clk_div;
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spi_set_clk(dws, chip->clk_div);
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}
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spi_set_clk(dws, chip->clk_div);
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}
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if (transfer->bits_per_word) {
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if (transfer->bits_per_word == 8) {
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dws->n_bytes = 1;
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dws->dma_width = 1;
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} else if (transfer->bits_per_word == 16) {
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dws->n_bytes = 2;
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dws->dma_width = 2;
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}
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cr0 = (transfer->bits_per_word - 1)
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| (chip->type << SPI_FRF_OFFSET)
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| (spi->mode << SPI_MODE_OFFSET)
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| (chip->tmode << SPI_TMOD_OFFSET);
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if (transfer->bits_per_word == 8) {
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dws->n_bytes = 1;
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dws->dma_width = 1;
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} else if (transfer->bits_per_word == 16) {
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dws->n_bytes = 2;
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dws->dma_width = 2;
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} else {
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return -EINVAL;
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}
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/* Default SPI mode is SCPOL = 0, SCPH = 0 */
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cr0 = (transfer->bits_per_word - 1)
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| (chip->type << SPI_FRF_OFFSET)
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| (spi->mode << SPI_MODE_OFFSET)
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| (chip->tmode << SPI_TMOD_OFFSET);
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/*
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* Adjust transfer mode if necessary. Requires platform dependent
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@ -439,34 +423,9 @@ static int dw_spi_setup(struct spi_device *spi)
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chip->poll_mode = chip_info->poll_mode;
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chip->type = chip_info->type;
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chip->rx_threshold = 0;
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chip->tx_threshold = 0;
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}
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if (spi->bits_per_word == 8) {
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chip->n_bytes = 1;
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chip->dma_width = 1;
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} else if (spi->bits_per_word == 16) {
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chip->n_bytes = 2;
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chip->dma_width = 2;
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}
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chip->bits_per_word = spi->bits_per_word;
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if (!spi->max_speed_hz) {
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dev_err(&spi->dev, "No max speed HZ parameter\n");
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return -EINVAL;
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}
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chip->tmode = 0; /* Tx & Rx */
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/* Default SPI mode is SCPOL = 0, SCPH = 0 */
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chip->cr0 = (chip->bits_per_word - 1)
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| (chip->type << SPI_FRF_OFFSET)
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| (spi->mode << SPI_MODE_OFFSET)
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| (chip->tmode << SPI_TMOD_OFFSET);
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if (spi->mode & SPI_LOOP)
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chip->cr0 |= 1 << SPI_SRL_OFFSET;
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if (gpio_is_valid(spi->cs_gpio)) {
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ret = gpio_direction_output(spi->cs_gpio,
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@ -524,13 +483,12 @@ int dw_spi_add_host(struct device *dev, struct dw_spi *dws)
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dws->master = master;
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dws->type = SSI_MOTO_SPI;
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dws->dma_inited = 0;
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dws->dma_addr = (dma_addr_t)(dws->paddr + 0x60);
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dws->dma_addr = (dma_addr_t)(dws->paddr + DW_SPI_DR);
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snprintf(dws->name, sizeof(dws->name), "dw_spi%d", dws->bus_num);
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ret = devm_request_irq(dev, dws->irq, dw_spi_irq, IRQF_SHARED,
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dws->name, master);
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ret = request_irq(dws->irq, dw_spi_irq, IRQF_SHARED, dws->name, master);
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if (ret < 0) {
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dev_err(&master->dev, "can not get IRQ\n");
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dev_err(dev, "can not get IRQ\n");
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goto err_free_master;
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}
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@ -573,6 +531,7 @@ int dw_spi_add_host(struct device *dev, struct dw_spi *dws)
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if (dws->dma_ops && dws->dma_ops->dma_exit)
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dws->dma_ops->dma_exit(dws);
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spi_enable_chip(dws, 0);
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free_irq(dws->irq, master);
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err_free_master:
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spi_master_put(master);
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return ret;
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@ -581,28 +540,27 @@ EXPORT_SYMBOL_GPL(dw_spi_add_host);
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void dw_spi_remove_host(struct dw_spi *dws)
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{
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if (!dws)
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return;
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dw_spi_debugfs_remove(dws);
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if (dws->dma_ops && dws->dma_ops->dma_exit)
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dws->dma_ops->dma_exit(dws);
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spi_enable_chip(dws, 0);
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/* Disable clk */
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spi_set_clk(dws, 0);
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spi_shutdown_chip(dws);
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free_irq(dws->irq, dws->master);
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}
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EXPORT_SYMBOL_GPL(dw_spi_remove_host);
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int dw_spi_suspend_host(struct dw_spi *dws)
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{
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int ret = 0;
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int ret;
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ret = spi_master_suspend(dws->master);
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if (ret)
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return ret;
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spi_enable_chip(dws, 0);
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spi_set_clk(dws, 0);
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return ret;
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spi_shutdown_chip(dws);
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return 0;
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}
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EXPORT_SYMBOL_GPL(dw_spi_suspend_host);
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@ -225,6 +225,12 @@ static inline void spi_reset_chip(struct dw_spi *dws)
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spi_enable_chip(dws, 1);
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}
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static inline void spi_shutdown_chip(struct dw_spi *dws)
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{
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spi_enable_chip(dws, 0);
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spi_set_clk(dws, 0);
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}
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/*
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* Each SPI slave device to work with dw_api controller should
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* has such a structure claiming its working mode (poll or PIO/DMA),
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