Merge branch 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull ARM irq chip fixes from Thomas Gleixner: "Another pile of ARM specific irq chip fixlets: - off by one bugs in the crossbar driver - missing annotations - a bunch of "make it compile" updates I pulled the lot today from Jason, but it has been in -next for at least a week" * 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: irqchip: gic-v3: Declare rdist as __percpu pointer to __iomem pointer irqchip: gic: Make gic_default_routable_irq_domain_ops static irqchip: exynos-combiner: Fix compilation error on ARM64 irqchip: crossbar: Off by one bugs in init irqchip: gic-v3: Tag all low level accessors __maybe_unused irqchip: gic-v3: Only define gic_peek_irq() when building SMP
This commit is contained in:
commit
8ac19f0d90
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@ -15,6 +15,7 @@
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#include <linux/slab.h>
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#include <linux/irqdomain.h>
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#include <linux/irqchip/chained_irq.h>
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#include <linux/interrupt.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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@ -220,7 +220,7 @@ static int __init crossbar_of_init(struct device_node *node)
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of_property_read_u32_index(node,
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"ti,irqs-reserved",
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i, &entry);
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if (entry > max) {
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if (entry >= max) {
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pr_err("Invalid reserved entry\n");
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ret = -EINVAL;
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goto err_irq_map;
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@ -238,7 +238,7 @@ static int __init crossbar_of_init(struct device_node *node)
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of_property_read_u32_index(node,
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"ti,irqs-skip",
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i, &entry);
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if (entry > max) {
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if (entry >= max) {
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pr_err("Invalid skip entry\n");
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ret = -EINVAL;
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goto err_irq_map;
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@ -36,7 +36,7 @@
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struct gic_chip_data {
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void __iomem *dist_base;
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void __iomem **redist_base;
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void __percpu __iomem **rdist;
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void __iomem * __percpu *rdist;
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struct irq_domain *domain;
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u64 redist_stride;
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u32 redist_regions;
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@ -104,7 +104,7 @@ static void gic_redist_wait_for_rwp(void)
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}
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/* Low level accessors */
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static u64 gic_read_iar(void)
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static u64 __maybe_unused gic_read_iar(void)
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{
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u64 irqstat;
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@ -112,24 +112,24 @@ static u64 gic_read_iar(void)
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return irqstat;
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}
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static void gic_write_pmr(u64 val)
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static void __maybe_unused gic_write_pmr(u64 val)
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{
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asm volatile("msr_s " __stringify(ICC_PMR_EL1) ", %0" : : "r" (val));
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}
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static void gic_write_ctlr(u64 val)
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static void __maybe_unused gic_write_ctlr(u64 val)
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{
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asm volatile("msr_s " __stringify(ICC_CTLR_EL1) ", %0" : : "r" (val));
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isb();
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}
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static void gic_write_grpen1(u64 val)
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static void __maybe_unused gic_write_grpen1(u64 val)
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{
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asm volatile("msr_s " __stringify(ICC_GRPEN1_EL1) ", %0" : : "r" (val));
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isb();
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}
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static void gic_write_sgi1r(u64 val)
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static void __maybe_unused gic_write_sgi1r(u64 val)
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{
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asm volatile("msr_s " __stringify(ICC_SGI1R_EL1) ", %0" : : "r" (val));
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}
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@ -200,19 +200,6 @@ static void gic_poke_irq(struct irq_data *d, u32 offset)
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rwp_wait();
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}
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static int gic_peek_irq(struct irq_data *d, u32 offset)
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{
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u32 mask = 1 << (gic_irq(d) % 32);
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void __iomem *base;
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if (gic_irq_in_rdist(d))
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base = gic_data_rdist_sgi_base();
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else
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base = gic_data.dist_base;
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return !!(readl_relaxed(base + offset + (gic_irq(d) / 32) * 4) & mask);
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}
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static void gic_mask_irq(struct irq_data *d)
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{
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gic_poke_irq(d, GICD_ICENABLER);
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@ -401,6 +388,19 @@ static void gic_cpu_init(void)
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}
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#ifdef CONFIG_SMP
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static int gic_peek_irq(struct irq_data *d, u32 offset)
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{
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u32 mask = 1 << (gic_irq(d) % 32);
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void __iomem *base;
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if (gic_irq_in_rdist(d))
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base = gic_data_rdist_sgi_base();
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else
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base = gic_data.dist_base;
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return !!(readl_relaxed(base + offset + (gic_irq(d) / 32) * 4) & mask);
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}
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static int gic_secondary_init(struct notifier_block *nfb,
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unsigned long action, void *hcpu)
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{
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@ -867,7 +867,7 @@ static int gic_routable_irq_domain_xlate(struct irq_domain *d,
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return 0;
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}
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const struct irq_domain_ops gic_default_routable_irq_domain_ops = {
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static const struct irq_domain_ops gic_default_routable_irq_domain_ops = {
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.map = gic_routable_irq_domain_map,
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.unmap = gic_routable_irq_domain_unmap,
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.xlate = gic_routable_irq_domain_xlate,
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