sh: drop _PAGE_FILE and pte_file()-related helpers
We've replaced remap_file_pages(2) implementation with emulation. Nobody creates non-linear mapping anymore. Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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@ -26,8 +26,6 @@
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* and timing control which (together with bit 0) are moved into the
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* old-style PTEA on the parts that support it.
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*
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* XXX: Leave the _PAGE_FILE and _PAGE_WT overhaul for a rainy day.
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*
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* SH-X2 MMUs and extended PTEs
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*
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* SH-X2 supports an extended mode TLB with split data arrays due to the
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@ -51,7 +49,6 @@
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#define _PAGE_PRESENT 0x100 /* V-bit : page is valid */
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#define _PAGE_PROTNONE 0x200 /* software: if not present */
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#define _PAGE_ACCESSED 0x400 /* software: page referenced */
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#define _PAGE_FILE _PAGE_WT /* software: pagecache or swap? */
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#define _PAGE_SPECIAL 0x800 /* software: special page */
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#define _PAGE_SZ_MASK (_PAGE_SZ0 | _PAGE_SZ1)
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@ -105,14 +102,13 @@ static inline unsigned long copy_ptea_attributes(unsigned long x)
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/* Mask which drops unused bits from the PTEL value */
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#if defined(CONFIG_CPU_SH3)
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#define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED| \
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_PAGE_FILE | _PAGE_SZ1 | \
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_PAGE_HW_SHARED)
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_PAGE_SZ1 | _PAGE_HW_SHARED)
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#elif defined(CONFIG_X2TLB)
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/* Get rid of the legacy PR/SZ bits when using extended mode */
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#define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED | \
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_PAGE_FILE | _PAGE_PR_MASK | _PAGE_SZ_MASK)
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_PAGE_PR_MASK | _PAGE_SZ_MASK)
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#else
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#define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED | _PAGE_FILE)
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#define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED)
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#endif
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#define _PAGE_FLAGS_HARDWARE_MASK (phys_addr_mask() & ~(_PAGE_CLEAR_FLAGS))
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@ -343,7 +339,6 @@ static inline void set_pte(pte_t *ptep, pte_t pte)
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#define pte_not_present(pte) (!((pte).pte_low & _PAGE_PRESENT))
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#define pte_dirty(pte) ((pte).pte_low & _PAGE_DIRTY)
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#define pte_young(pte) ((pte).pte_low & _PAGE_ACCESSED)
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#define pte_file(pte) ((pte).pte_low & _PAGE_FILE)
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#define pte_special(pte) ((pte).pte_low & _PAGE_SPECIAL)
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#ifdef CONFIG_X2TLB
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@ -445,7 +440,6 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
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* Encode and de-code a swap entry
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*
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* Constraints:
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* _PAGE_FILE at bit 0
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* _PAGE_PRESENT at bit 8
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* _PAGE_PROTNONE at bit 9
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*
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@ -453,9 +447,7 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
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* swap offset into bits 10:30. For the 64-bit PTE case, we keep the
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* preserved bits in the low 32-bits and use the upper 32 as the swap
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* offset (along with a 5-bit type), following the same approach as x86
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* PAE. This keeps the logic quite simple, and allows for a full 32
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* PTE_FILE_MAX_BITS, as opposed to the 29-bits we're constrained with
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* in the pte_low case.
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* PAE. This keeps the logic quite simple.
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*
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* As is evident by the Alpha code, if we ever get a 64-bit unsigned
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* long (swp_entry_t) to match up with the 64-bit PTEs, this all becomes
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@ -471,13 +463,6 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
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#define __pte_to_swp_entry(pte) ((swp_entry_t){ (pte).pte_high })
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#define __swp_entry_to_pte(x) ((pte_t){ 0, (x).val })
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/*
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* Encode and decode a nonlinear file mapping entry
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*/
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#define pte_to_pgoff(pte) ((pte).pte_high)
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#define pgoff_to_pte(off) ((pte_t) { _PAGE_FILE, (off) })
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#define PTE_FILE_MAX_BITS 32
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#else
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#define __swp_type(x) ((x).val & 0xff)
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#define __swp_offset(x) ((x).val >> 10)
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@ -485,13 +470,6 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
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#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) >> 1 })
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#define __swp_entry_to_pte(x) ((pte_t) { (x).val << 1 })
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/*
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* Encode and decode a nonlinear file mapping entry
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*/
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#define PTE_FILE_MAX_BITS 29
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#define pte_to_pgoff(pte) (pte_val(pte) >> 1)
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#define pgoff_to_pte(off) ((pte_t) { ((off) << 1) | _PAGE_FILE })
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#endif
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#endif /* __ASSEMBLY__ */
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@ -107,7 +107,6 @@ static __inline__ void set_pte(pte_t *pteptr, pte_t pteval)
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#define _PAGE_DEVICE 0x001 /* CB0: if uncacheable, 1->device (i.e. no write-combining or reordering at bus level) */
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#define _PAGE_CACHABLE 0x002 /* CB1: uncachable/cachable */
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#define _PAGE_PRESENT 0x004 /* software: page referenced */
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#define _PAGE_FILE 0x004 /* software: only when !present */
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#define _PAGE_SIZE0 0x008 /* SZ0-bit : size of page */
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#define _PAGE_SIZE1 0x010 /* SZ1-bit : size of page */
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#define _PAGE_SHARED 0x020 /* software: reflects PTEH's SH */
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@ -129,7 +128,7 @@ static __inline__ void set_pte(pte_t *pteptr, pte_t pteval)
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#define _PAGE_WIRED _PAGE_EXT(0x001) /* software: wire the tlb entry */
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#define _PAGE_SPECIAL _PAGE_EXT(0x002)
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#define _PAGE_CLEAR_FLAGS (_PAGE_PRESENT | _PAGE_FILE | _PAGE_SHARED | \
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#define _PAGE_CLEAR_FLAGS (_PAGE_PRESENT | _PAGE_SHARED | \
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_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_WIRED)
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/* Mask which drops software flags */
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@ -260,7 +259,6 @@ static __inline__ void set_pte(pte_t *pteptr, pte_t pteval)
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*/
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static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; }
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static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
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static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; }
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static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_WRITE; }
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static inline int pte_special(pte_t pte){ return pte_val(pte) & _PAGE_SPECIAL; }
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@ -304,11 +302,6 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
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#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
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#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
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/* Encode and decode a nonlinear file mapping entry */
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#define PTE_FILE_MAX_BITS 29
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#define pte_to_pgoff(pte) (pte_val(pte))
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#define pgoff_to_pte(off) ((pte_t) { (off) | _PAGE_FILE })
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#endif /* !__ASSEMBLY__ */
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#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
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