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MIPS: BMIPS: dts: Add uart device nodes to bcm7xxx platforms 

Add two uart device nodes known as the uart1 and uart2 for the bcm7xxx
platforms.

Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
Cc: Kevin Cernekee <cernekee@gmail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/9991/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Jaedon Shin 2015-05-08 21:59:18 +09:00 committed by Ralf Baechle
parent 380e4270f5
commit 8bac078c5d
8 changed files with 136 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

26
arch/mips/boot/dts/brcm/bcm7346.dtsi
View File

@ -24,6 +24,8 @@ cpu@1 {
aliases {
uart0 = &uart0;
uart1 = &uart1;
uart2 = &uart2;
};
cpu_intc: cpu_intc {
@ -118,6 +120,30 @@ uart0: serial@406900 {
status = "disabled";
};
uart1: serial@406940 {
compatible = "ns16550a";
reg = <0x406940 0x20>;
reg-io-width = <0x4>;
reg-shift = <0x2>;
native-endian;
interrupt-parent = <&periph_intc>;
interrupts = <65>;
clocks = <&uart_clk>;
status = "disabled";
};
uart2: serial@406980 {
compatible = "ns16550a";
reg = <0x406980 0x20>;
reg-io-width = <0x4>;
reg-shift = <0x2>;
native-endian;
interrupt-parent = <&periph_intc>;
interrupts = <66>;
clocks = <&uart_clk>;
status = "disabled";
};
enet0: ethernet@430000 {
phy-mode = "internal";
phy-handle = <&phy1>;

26
arch/mips/boot/dts/brcm/bcm7358.dtsi
View File

@ -18,6 +18,8 @@ cpu@0 {
aliases {
uart0 = &uart0;
uart1 = &uart1;
uart2 = &uart2;
};
cpu_intc: cpu_intc {
@ -112,6 +114,30 @@ uart0: serial@406800 {
status = "disabled";
};
uart1: serial@406840 {
compatible = "ns16550a";
reg = <0x406840 0x20>;
reg-io-width = <0x4>;
reg-shift = <0x2>;
native-endian;
interrupt-parent = <&periph_intc>;
interrupts = <62>;
clocks = <&uart_clk>;
status = "disabled";
};
uart2: serial@406880 {
compatible = "ns16550a";
reg = <0x406880 0x20>;
reg-io-width = <0x4>;
reg-shift = <0x2>;
native-endian;
interrupt-parent = <&periph_intc>;
interrupts = <63>;
clocks = <&uart_clk>;
status = "disabled";
};
enet0: ethernet@430000 {
phy-mode = "internal";
phy-handle = <&phy1>;

26
arch/mips/boot/dts/brcm/bcm7360.dtsi
View File

@ -18,6 +18,8 @@ cpu@0 {
aliases {
uart0 = &uart0;
uart1 = &uart1;
uart2 = &uart2;
};
cpu_intc: cpu_intc {
@ -112,6 +114,30 @@ uart0: serial@406800 {
status = "disabled";
};
uart1: serial@406840 {
compatible = "ns16550a";
reg = <0x406840 0x20>;
reg-io-width = <0x4>;
reg-shift = <0x2>;
native-endian;
interrupt-parent = <&periph_intc>;
interrupts = <62>;
clocks = <&uart_clk>;
status = "disabled";
};
uart2: serial@406880 {
compatible = "ns16550a";
reg = <0x406880 0x20>;
reg-io-width = <0x4>;
reg-shift = <0x2>;
native-endian;
interrupt-parent = <&periph_intc>;
interrupts = <63>;
clocks = <&uart_clk>;
status = "disabled";
};
enet0: ethernet@430000 {
phy-mode = "internal";
phy-handle = <&phy1>;

26
arch/mips/boot/dts/brcm/bcm7362.dtsi
View File

@ -24,6 +24,8 @@ cpu@1 {
aliases {
uart0 = &uart0;
uart1 = &uart1;
uart2 = &uart2;
};
cpu_intc: cpu_intc {
@ -118,6 +120,30 @@ uart0: serial@406800 {
status = "disabled";
};
uart1: serial@406840 {
compatible = "ns16550a";
reg = <0x406840 0x20>;
reg-io-width = <0x4>;
reg-shift = <0x2>;
native-endian;
interrupt-parent = <&periph_intc>;
interrupts = <62>;
clocks = <&uart_clk>;
status = "disabled";
};
uart2: serial@406880 {
compatible = "ns16550a";
reg = <0x406880 0x20>;
reg-io-width = <0x4>;
reg-shift = <0x2>;
native-endian;
interrupt-parent = <&periph_intc>;
interrupts = <63>;
clocks = <&uart_clk>;
status = "disabled";
};
enet0: ethernet@430000 {
phy-mode = "internal";
phy-handle = <&phy1>;

8
arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
View File

@ -21,6 +21,14 @@ &uart0 {
status = "okay";
};
&uart1 {
status = "okay";
};
&uart2 {
status = "okay";
};
&enet0 {
status = "okay";
};

8
arch/mips/boot/dts/brcm/bcm97358svmb.dts
View File

@ -21,6 +21,14 @@ &uart0 {
status = "okay";
};
&uart1 {
status = "okay";
};
&uart2 {
status = "okay";
};
&enet0 {
status = "okay";
};

8
arch/mips/boot/dts/brcm/bcm97360svmb.dts
View File

@ -21,6 +21,14 @@ &uart0 {
status = "okay";
};
&uart1 {
status = "okay";
};
&uart2 {
status = "okay";
};
&enet0 {
status = "okay";
};

8
arch/mips/boot/dts/brcm/bcm97362svmb.dts
View File

@ -21,6 +21,14 @@ &uart0 {
status = "okay";
};
&uart1 {
status = "okay";
};
&uart2 {
status = "okay";
};
&enet0 {
status = "okay";
};