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arm64: dts: imx8mp-evk: correct I2C5 pad settings 

According to RM bit layout, BIT3 and BIT0 are reserved.
 8  7   6   5   4   3  2 1  0
PE HYS PUE ODE FSEL X  DSE  X

Although function is not broken, we should not set reserved bit.

Fixes: 8134822db0 ("arm64: dts: imx8mp-evk: add support for I2C5")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Peng Fan 2022-06-22 14:14:03 +08:00 committed by Shawn Guo
parent 95587ecfcf
commit 8c214b78e1
1 changed files with 2 additions and 2 deletions
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4
arch/arm64/boot/dts/freescale/imx8mp-evk.dts
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@ -481,8 +481,8 @@ MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA 0x400001c3
pinctrl_i2c5: i2c5grp {
fsl,pins = <
MX8MP_IOMUXC_SPDIF_RX__I2C5_SDA 0x400001c3
MX8MP_IOMUXC_SPDIF_TX__I2C5_SCL 0x400001c3
MX8MP_IOMUXC_SPDIF_RX__I2C5_SDA 0x400001c2
MX8MP_IOMUXC_SPDIF_TX__I2C5_SCL 0x400001c2
>;
};