ARM: SoC fixes for v4.9
This should be the last set of bugfixes for arm-soc in v4.9. None of these are critical regressions, but it would be nice to still get them merged. - On the Juno platform, the idle latency was described wrong, leading to suboptimal cpuidle tuning. - Also on the same platform, PCI I/O space was set up incorrectly and could not work. - On the sti platform, a syntactically incorrect DT entry caused warnings. - The newly added 'gr8' platform has somewhat confusing file names, which we rename for consistency. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIVAwUAWEHbGWCrR//JCVInAQKDbg//RRY2HqrkaRhEk9ZKFlWA4TiOqp61vuB9 FheAld7gwtY7fnqsfiWrXWQz6oIa/MGq0BYvvcemrUaVAjDA8PP3M8LoeC797bnP pPsmlVgjq86wWBAgHyTTEQsmuIMAZaaVoSCrrk9GFpNstNrPBVLm/yDs0A5/Ft87 se9Mvm/X8SErDB7GcOjyaH3rYk+pFr9irDvJzup0A/JeESohdLQOsWFi+WUg9sSr 9fiAkSIHyivHoNwvNGXgg2+PV9EyAtStEvzTe60zElRVtwKeVX+CwBt56neHMzIE yqKrayJ0ZAeTeobtYZtV+jgqFnv9h8anXostty3nlsqOxlZ/wxrQRLkly5UJFiuF yXP0850ocIzsiBtInbbv1w4+08YP84i7CMIU1GGrPfUBguarAJrWWhfhPnMLiy0F PZABUqeKgA+nEuM1gwTnC+pR+73CBPPn4B0Li2pRedA42rCXJIzFkEMuxEupyrcL LZMxwK5C5iUkJMFPIM/q9par4gkIjbLoYLC1yMPY0OziaT5WHG5qpfSmbXBsLo2S yezdNS9BKts3stOXfcH9ZeuqeaiZyZ3hi4Ry+cXoVmVs26zE0QHv4uVm5h0gc2J8 BcgovfCJd/sTPL+FwZQB8BjCGOrkZW95Lg+79kSmxZyV6hvMglu6kJ1K2M3KTO7l 7J+g5f790+k= =0ZGG -----END PGP SIGNATURE----- Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC fixes from Arnd Bergmann: "This should be the last set of bugfixes for arm-soc in v4.9. None of these are critical regressions, but it would be nice to still get them merged. - On the Juno platform, the idle latency was described wrong, leading to suboptimal cpuidle tuning. - Also on the same platform, PCI I/O space was set up incorrectly and could not work. - On the sti platform, a syntactically incorrect DT entry caused warnings. - The newly added 'gr8' platform has somewhat confusing file names, which we rename for consistency" * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: arm64: dts: juno: fix cluster sleep state entry latency on all SoC versions arm64: dts: juno: Correct PCI IO window ARM: dts: STiH407-family: fix i2c nodes ARM: gr8: Rename the DTSI and relevant DTS
This commit is contained in:
commit
8dc0f265d3
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@ -745,7 +745,6 @@ dtb-$(CONFIG_MACH_SUN4I) += \
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sun4i-a10-pcduino2.dtb \
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sun4i-a10-pov-protab2-ips9.dtb
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dtb-$(CONFIG_MACH_SUN5I) += \
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ntc-gr8-evb.dtb \
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sun5i-a10s-auxtek-t003.dtb \
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sun5i-a10s-auxtek-t004.dtb \
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sun5i-a10s-mk802.dtb \
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@ -761,6 +760,7 @@ dtb-$(CONFIG_MACH_SUN5I) += \
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sun5i-a13-olinuxino-micro.dtb \
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sun5i-a13-q8-tablet.dtb \
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sun5i-a13-utoo-p66.dtb \
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sun5i-gr8-evb.dtb \
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sun5i-r8-chip.dtb
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dtb-$(CONFIG_MACH_SUN6I) += \
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sun6i-a31-app4-evb1.dtb \
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@ -283,6 +283,8 @@ i2c@9840000 {
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c0_default>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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@ -296,6 +298,8 @@ i2c@9841000 {
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1_default>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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@ -309,6 +313,8 @@ i2c@9842000 {
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2_default>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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@ -322,6 +328,8 @@ i2c@9843000 {
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c3_default>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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@ -335,6 +343,8 @@ i2c@9844000 {
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c4_default>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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@ -348,6 +358,8 @@ i2c@9845000 {
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c5_default>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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@ -363,6 +375,8 @@ i2c@9540000 {
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c10_default>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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@ -376,6 +390,8 @@ i2c@9541000 {
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c11_default>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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@ -44,7 +44,7 @@
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*/
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/dts-v1/;
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#include "ntc-gr8.dtsi"
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#include "sun5i-gr8.dtsi"
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#include "sunxi-common-regulators.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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@ -393,7 +393,7 @@ pcie_ctlr: pcie-controller@40000000 {
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#address-cells = <3>;
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#size-cells = <2>;
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dma-coherent;
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ranges = <0x01000000 0x00 0x5f800000 0x00 0x5f800000 0x0 0x00800000>,
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ranges = <0x01000000 0x00 0x00000000 0x00 0x5f800000 0x0 0x00800000>,
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<0x02000000 0x00 0x50000000 0x00 0x50000000 0x0 0x08000000>,
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<0x42000000 0x40 0x00000000 0x40 0x00000000 0x1 0x00000000>;
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#interrupt-cells = <1>;
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@ -76,7 +76,7 @@ CLUSTER_SLEEP_0: cluster-sleep-0 {
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compatible = "arm,idle-state";
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arm,psci-suspend-param = <0x1010000>;
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local-timer-stop;
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entry-latency-us = <300>;
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entry-latency-us = <400>;
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exit-latency-us = <1200>;
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min-residency-us = <2500>;
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};
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@ -76,7 +76,7 @@ CLUSTER_SLEEP_0: cluster-sleep-0 {
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compatible = "arm,idle-state";
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arm,psci-suspend-param = <0x1010000>;
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local-timer-stop;
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entry-latency-us = <300>;
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entry-latency-us = <400>;
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exit-latency-us = <1200>;
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min-residency-us = <2500>;
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};
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@ -76,7 +76,7 @@ CLUSTER_SLEEP_0: cluster-sleep-0 {
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compatible = "arm,idle-state";
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arm,psci-suspend-param = <0x1010000>;
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local-timer-stop;
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entry-latency-us = <300>;
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entry-latency-us = <400>;
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exit-latency-us = <1200>;
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min-residency-us = <2500>;
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};
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