arm64: tegra: Enable GM20B GPU on Tegra210
Complement the GM20B GPU device tree node on Tegra210 with missing properties to make it usable. -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAABCAAGBQJXI3yjAAoJEN0jrNd/PrOhmUEQAK73RCf3YtRpEFMWOFIrU6cG 5YsUw5auf65Bc98mFn9a+3lEUMl7QBpLrY3QialllK+CA4pQDs74fwk3rEZ0pSIK BUQMaKpkoYsfEqbsV3zEYLfVXkoK5oss1Vd6KfjR0qH4dDQJ8cAEPHkm0KGs4Mxo ud1AsZ/0L/3zQEvSZqdEks7N+g+yBXtSzx7CnQ8y9OEHdLQAvh5f1WD5rKc8ir+z P/ufsl16J365Sv4JTOzWQhnOaQXgSyzM+CECGZtcCTd0GTel1y6O+SRgIkKv9nD5 jeFcPMuMYvPKD4FeZgedMia1NQd1mkwWA5gEb4KwOfxgGFUKkYft6hy2Zx4wUVm2 I9tvDhzzOJduJUu3F69Zws6ztHUPB5zM3hIrSPptkOVME6k063TBGVItGH0NgJAT fubvqi0xbVHhZ6jGSY6kwwo1nnIB2DtPcgF8Gm0bHctF4Zveyo3Vq5iyaTWPjEhj l+qc1rTgmQf2lFvMUXEsIQbl8b8m/UcWK2hrGj7Wq0qvD8CwP4wg0S8uRm+hDBX0 ZUk0lIqC1PBDZkVETkzNEpXI6eKeixaXYgr6jsCCFUZdBmeFJ/4m+Kbn5xCNObGJ pwGkhSZceBABgGz/p/yfAS0RRlmfYotg4yRa0JHkVgfK2oqOtAl5QiQzN4fMyRkt vAPrcTd61LCB4hiC31K3 =yX4c -----END PGP SIGNATURE----- Merge tag 'tegra-for-4.7-gm20b' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt64 Merge "arm64: tegra: Enable GM20B GPU on Tegra210" from Thierry Reding: Complement the GM20B GPU device tree node on Tegra210 with missing properties to make it usable. * tag 'tegra-for-4.7-gm20b' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: arm64: tegra: Add IOMMU node to GM20B on Tegra210 arm64: tegra: Add reference clock to GM20B on Tegra210 dt-bindings: Add documentation for GM20B GPU dt-bindings: gk20a: Document iommus property dt-bindings: gk20a: Fix typo in compatible name
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@ -1,9 +1,10 @@
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NVIDIA GK20A Graphics Processing Unit
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NVIDIA Tegra Graphics Processing Units
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Required properties:
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Required properties:
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- compatible: "nvidia,<chip>-<gpu>"
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- compatible: "nvidia,<gpu>"
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Currently recognized values:
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Currently recognized values:
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- nvidia,tegra124-gk20a
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- nvidia,gk20a
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- nvidia,gm20b
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- reg: Physical base address and length of the controller's registers.
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- reg: Physical base address and length of the controller's registers.
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Must contain two entries:
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Must contain two entries:
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- first entry for bar0
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- first entry for bar0
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@ -19,14 +20,20 @@ Required properties:
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- clock-names: Must include the following entries:
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- clock-names: Must include the following entries:
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- gpu
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- gpu
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- pwr
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- pwr
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If the compatible string is "nvidia,gm20b", then the following clock
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is also required:
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- ref
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- resets: Must contain an entry for each entry in reset-names.
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- resets: Must contain an entry for each entry in reset-names.
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See ../reset/reset.txt for details.
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See ../reset/reset.txt for details.
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- reset-names: Must include the following entries:
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- reset-names: Must include the following entries:
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- gpu
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- gpu
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Example:
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Optional properties:
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- iommus: A reference to the IOMMU. See ../iommu/iommu.txt for details.
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gpu@0,57000000 {
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Example for GK20A:
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gpu@57000000 {
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compatible = "nvidia,gk20a";
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compatible = "nvidia,gk20a";
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reg = <0x0 0x57000000 0x0 0x01000000>,
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reg = <0x0 0x57000000 0x0 0x01000000>,
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<0x0 0x58000000 0x0 0x01000000>;
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<0x0 0x58000000 0x0 0x01000000>;
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@ -39,5 +46,25 @@ Example:
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clock-names = "gpu", "pwr";
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clock-names = "gpu", "pwr";
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resets = <&tegra_car 184>;
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resets = <&tegra_car 184>;
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reset-names = "gpu";
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reset-names = "gpu";
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iommus = <&mc TEGRA_SWGROUP_GPU>;
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status = "disabled";
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};
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Example for GM20B:
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gpu@57000000 {
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compatible = "nvidia,gm20b";
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reg = <0x0 0x57000000 0x0 0x01000000>,
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<0x0 0x58000000 0x0 0x01000000>;
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interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "stall", "nonstall";
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clocks = <&tegra_car TEGRA210_CLK_GPU>,
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<&tegra_car TEGRA210_CLK_PLL_P_OUT5>,
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<&tegra_car TEGRA210_CLK_PLL_G_REF>;
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clock-names = "gpu", "pwr", "ref";
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resets = <&tegra_car 184>;
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reset-names = "gpu";
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iommus = <&mc TEGRA_SWGROUP_GPU>;
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status = "disabled";
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status = "disabled";
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};
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};
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@ -226,10 +226,14 @@ gpu@57000000 {
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<GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
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<GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "stall", "nonstall";
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interrupt-names = "stall", "nonstall";
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clocks = <&tegra_car TEGRA210_CLK_GPU>,
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clocks = <&tegra_car TEGRA210_CLK_GPU>,
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<&tegra_car TEGRA210_CLK_PLL_P_OUT5>;
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<&tegra_car TEGRA210_CLK_PLL_P_OUT5>,
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clock-names = "gpu", "pwr";
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<&tegra_car TEGRA210_CLK_PLL_G_REF>;
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clock-names = "gpu", "pwr", "ref";
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resets = <&tegra_car 184>;
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resets = <&tegra_car 184>;
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reset-names = "gpu";
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reset-names = "gpu";
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iommus = <&mc TEGRA_SWGROUP_GPU>;
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status = "disabled";
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status = "disabled";
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};
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};
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