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drivers: sh: clk: Remove obsolete and unused clk_round_parent() 

clk_round_parent() was only ever used by AP4EVB, until commit
b24bd7e97b ("ARM: shmobile: Remove AP4EVB board support").

The Common Clock Framework does not provide clk_round_parent(), hence
remove it.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Geert Uytterhoeven 2015-11-19 19:32:07 +01:00 committed by Simon Horman
parent 0ba58de231
commit 90069ad1b6
2 changed files with 0 additions and 92 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

88
drivers/sh/clk/core.c
View File

@ -555,94 +555,6 @@ long clk_round_rate(struct clk *clk, unsigned long rate)
} }
EXPORT_SYMBOL_GPL(clk_round_rate); EXPORT_SYMBOL_GPL(clk_round_rate);
long clk_round_parent(struct clk *clk, unsigned long target,
unsigned long *best_freq, unsigned long *parent_freq,
unsigned int div_min, unsigned int div_max)
{
struct cpufreq_frequency_table *freq, *best = NULL;
unsigned long error = ULONG_MAX, freq_high, freq_low, div;
struct clk *parent = clk_get_parent(clk);
if (!parent) {
*parent_freq = 0;
*best_freq = clk_round_rate(clk, target);
return abs(target - *best_freq);
}
cpufreq_for_each_valid_entry(freq, parent->freq_table) {
if (unlikely(freq->frequency / target <= div_min - 1)) {
unsigned long freq_max;
freq_max = (freq->frequency + div_min / 2) / div_min;
if (error > target - freq_max) {
error = target - freq_max;
best = freq;
if (best_freq)
*best_freq = freq_max;
}
pr_debug("too low freq %u, error %lu\n", freq->frequency,
target - freq_max);
if (!error)
break;
continue;
}
if (unlikely(freq->frequency / target >= div_max)) {
unsigned long freq_min;
freq_min = (freq->frequency + div_max / 2) / div_max;
if (error > freq_min - target) {
error = freq_min - target;
best = freq;
if (best_freq)
*best_freq = freq_min;
}
pr_debug("too high freq %u, error %lu\n", freq->frequency,
freq_min - target);
if (!error)
break;
continue;
}
div = freq->frequency / target;
freq_high = freq->frequency / div;
freq_low = freq->frequency / (div + 1);
if (freq_high - target < error) {
error = freq_high - target;
best = freq;
if (best_freq)
*best_freq = freq_high;
}
if (target - freq_low < error) {
error = target - freq_low;
best = freq;
if (best_freq)
*best_freq = freq_low;
}
pr_debug("%u / %lu = %lu, / %lu = %lu, best %lu, parent %u\n",
freq->frequency, div, freq_high, div + 1, freq_low,
*best_freq, best->frequency);
if (!error)
break;
}
if (parent_freq)
*parent_freq = best->frequency;
return error;
}
EXPORT_SYMBOL_GPL(clk_round_parent);
#ifdef CONFIG_PM #ifdef CONFIG_PM
static void clks_core_resume(void) static void clks_core_resume(void)
{ {

4
include/linux/sh_clk.h
View File

@ -113,10 +113,6 @@ long clk_rate_div_range_round(struct clk *clk, unsigned int div_min,
long clk_rate_mult_range_round(struct clk *clk, unsigned int mult_min, long clk_rate_mult_range_round(struct clk *clk, unsigned int mult_min,
unsigned int mult_max, unsigned long rate); unsigned int mult_max, unsigned long rate);
long clk_round_parent(struct clk *clk, unsigned long target,
unsigned long *best_freq, unsigned long *parent_freq,
unsigned int div_min, unsigned int div_max);
#define SH_CLK_MSTP(_parent, _enable_reg, _enable_bit, _status_reg, _flags) \ #define SH_CLK_MSTP(_parent, _enable_reg, _enable_bit, _status_reg, _flags) \
{ \ { \
.parent = _parent, \ .parent = _parent, \