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drm/nouveau/mmu: switch to new-style timer macros 

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
Ben Skeggs 2015-08-20 14:54:11 +10:00
parent 1302bcbb82
commit 909604d444
4 changed files with 20 additions and 15 deletions
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16
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gf100.c
View File

@ -170,19 +170,19 @@ gf100_vm_flush(struct nvkm_vm *vm)
/* looks like maybe a "free flush slots" counter, the
* faster you write to 0x100cbc to more it decreases
*/
if (!nv_wait_ne(mmu, 0x100c80, 0x00ff0000, 0x00000000)) {
nv_error(mmu, "vm timeout 0: 0x%08x %d\n",
nvkm_rd32(device, 0x100c80), type);
}
nvkm_msec(device, 2000,
if (nvkm_rd32(device, 0x100c80) & 0x00ff0000)
break;
);
nvkm_wr32(device, 0x100cb8, vpgd->obj->addr >> 8);
nvkm_wr32(device, 0x100cbc, 0x80000000 | type);
/* wait for flush to be queued? */
if (!nv_wait(mmu, 0x100c80, 0x00008000, 0x00008000)) {
nv_error(mmu, "vm timeout 1: 0x%08x %d\n",
nvkm_rd32(device, 0x100c80), type);
}
nvkm_msec(device, 2000,
if (nvkm_rd32(device, 0x100c80) & 0x00008000)
break;
);
}
mutex_unlock(&nv_subdev(mmu)->mutex);
}

8
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/nv41.c
View File

@ -69,10 +69,10 @@ nv41_vm_flush(struct nvkm_vm *vm)
mutex_lock(&nv_subdev(mmu)->mutex);
nvkm_wr32(device, 0x100810, 0x00000022);
if (!nv_wait(mmu, 0x100810, 0x00000020, 0x00000020)) {
nv_warn(mmu, "flush timeout, 0x%08x\n",
nvkm_rd32(device, 0x100810));
}
nvkm_msec(device, 2000,
if (nvkm_rd32(device, 0x100810) & 0x00000020)
break;
);
nvkm_wr32(device, 0x100810, 0x00000000);
mutex_unlock(&nv_subdev(mmu)->mutex);
}

6
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/nv44.c
View File

@ -143,8 +143,10 @@ nv44_vm_flush(struct nvkm_vm *vm)
struct nvkm_device *device = mmu->base.subdev.device;
nvkm_wr32(device, 0x100814, mmu->base.limit - NV44_GART_PAGE);
nvkm_wr32(device, 0x100808, 0x00000020);
if (!nv_wait(mmu, 0x100808, 0x00000001, 0x00000001))
nv_error(mmu, "timeout: 0x%08x\n", nvkm_rd32(device, 0x100808));
nvkm_msec(device, 2000,
if (nvkm_rd32(device, 0x100808) & 0x00000001)
break;
);
nvkm_wr32(device, 0x100808, 0x00000000);
}

5
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/nv50.c
View File

@ -182,7 +182,10 @@ nv50_vm_flush(struct nvkm_vm *vm)
}
nvkm_wr32(device, 0x100c80, (vme << 16) | 1);
if (!nv_wait(mmu, 0x100c80, 0x00000001, 0x00000000))
if (nvkm_msec(device, 2000,
if (!(nvkm_rd32(device, 0x100c80) & 0x00000001))
break;
) < 0)
nv_error(mmu, "vm flush timeout: engine %d\n", vme);
}
mutex_unlock(&nv_subdev(mmu)->mutex);