arm/arm64: KVM: vgic: Factor out level irq processing on guest exit
Currently vgic_process_maintenance() processes dealing with a completed level-triggered interrupt directly, but we are soon going to reuse this logic for level-triggered mapped interrupts with the HW bit set, so move this logic into a separate static function. Probably the most scary part of this commit is convincing yourself that the current flow is safe compared to the old one. In the following I try to list the changes and why they are harmless: Move vgic_irq_clear_queued after kvm_notify_acked_irq: Harmless because the only potential effect of clearing the queued flag wrt. kvm_set_irq is that vgic_update_irq_pending does not set the pending bit on the emulated CPU interface or in the pending_on_cpu bitmask if the function is called with level=1. However, the point of kvm_notify_acked_irq is to call kvm_set_irq with level=0, and we set the queued flag again in __kvm_vgic_sync_hwstate later on if the level is stil high. Move vgic_set_lr before kvm_notify_acked_irq: Also, harmless because the LR are cpu-local operations and kvm_notify_acked only affects the dist Move vgic_dist_irq_clear_soft_pend after kvm_notify_acked_irq: Also harmless, because now we check the level state in the clear_soft_pend function and lower the pending bits if the level is low. Reviewed-by: Eric Auger <eric.auger@linaro.org> Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
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@ -107,6 +107,7 @@ static struct vgic_lr vgic_get_lr(const struct kvm_vcpu *vcpu, int lr);
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static void vgic_set_lr(struct kvm_vcpu *vcpu, int lr, struct vgic_lr lr_desc);
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static struct irq_phys_map *vgic_irq_map_search(struct kvm_vcpu *vcpu,
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int virt_irq);
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static int compute_pending_for_cpu(struct kvm_vcpu *vcpu);
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static const struct vgic_ops *vgic_ops;
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static const struct vgic_params *vgic;
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@ -357,6 +358,11 @@ static void vgic_dist_irq_clear_soft_pend(struct kvm_vcpu *vcpu, int irq)
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struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
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vgic_bitmap_set_irq_val(&dist->irq_soft_pend, vcpu->vcpu_id, irq, 0);
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if (!vgic_dist_irq_get_level(vcpu, irq)) {
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vgic_dist_irq_clear_pending(vcpu, irq);
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if (!compute_pending_for_cpu(vcpu))
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clear_bit(vcpu->vcpu_id, dist->irq_pending_on_cpu);
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}
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}
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static int vgic_dist_irq_is_pending(struct kvm_vcpu *vcpu, int irq)
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@ -1338,12 +1344,56 @@ static void __kvm_vgic_flush_hwstate(struct kvm_vcpu *vcpu)
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}
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}
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static int process_level_irq(struct kvm_vcpu *vcpu, int lr, struct vgic_lr vlr)
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{
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int level_pending = 0;
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vlr.state = 0;
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vlr.hwirq = 0;
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vgic_set_lr(vcpu, lr, vlr);
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/*
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* If the IRQ was EOIed (called from vgic_process_maintenance) or it
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* went from active to non-active (called from vgic_sync_hwirq) it was
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* also ACKed and we we therefore assume we can clear the soft pending
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* state (should it had been set) for this interrupt.
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*
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* Note: if the IRQ soft pending state was set after the IRQ was
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* acked, it actually shouldn't be cleared, but we have no way of
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* knowing that unless we start trapping ACKs when the soft-pending
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* state is set.
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*/
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vgic_dist_irq_clear_soft_pend(vcpu, vlr.irq);
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/*
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* Tell the gic to start sampling the line of this interrupt again.
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*/
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vgic_irq_clear_queued(vcpu, vlr.irq);
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/* Any additional pending interrupt? */
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if (vgic_dist_irq_get_level(vcpu, vlr.irq)) {
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vgic_cpu_irq_set(vcpu, vlr.irq);
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level_pending = 1;
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} else {
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vgic_dist_irq_clear_pending(vcpu, vlr.irq);
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vgic_cpu_irq_clear(vcpu, vlr.irq);
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}
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/*
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* Despite being EOIed, the LR may not have
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* been marked as empty.
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*/
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vgic_sync_lr_elrsr(vcpu, lr, vlr);
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return level_pending;
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}
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static bool vgic_process_maintenance(struct kvm_vcpu *vcpu)
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{
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u32 status = vgic_get_interrupt_status(vcpu);
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struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
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bool level_pending = false;
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struct kvm *kvm = vcpu->kvm;
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int level_pending = 0;
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kvm_debug("STATUS = %08x\n", status);
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@ -1358,54 +1408,22 @@ static bool vgic_process_maintenance(struct kvm_vcpu *vcpu)
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for_each_set_bit(lr, eisr_ptr, vgic->nr_lr) {
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struct vgic_lr vlr = vgic_get_lr(vcpu, lr);
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WARN_ON(vgic_irq_is_edge(vcpu, vlr.irq));
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spin_lock(&dist->lock);
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vgic_irq_clear_queued(vcpu, vlr.irq);
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WARN_ON(vlr.state & LR_STATE_MASK);
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vlr.state = 0;
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vgic_set_lr(vcpu, lr, vlr);
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/*
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* If the IRQ was EOIed it was also ACKed and we we
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* therefore assume we can clear the soft pending
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* state (should it had been set) for this interrupt.
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*
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* Note: if the IRQ soft pending state was set after
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* the IRQ was acked, it actually shouldn't be
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* cleared, but we have no way of knowing that unless
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* we start trapping ACKs when the soft-pending state
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* is set.
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*/
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vgic_dist_irq_clear_soft_pend(vcpu, vlr.irq);
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/*
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* kvm_notify_acked_irq calls kvm_set_irq()
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* to reset the IRQ level. Need to release the
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* lock for kvm_set_irq to grab it.
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* to reset the IRQ level, which grabs the dist->lock
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* so we call this before taking the dist->lock.
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*/
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spin_unlock(&dist->lock);
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kvm_notify_acked_irq(kvm, 0,
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vlr.irq - VGIC_NR_PRIVATE_IRQS);
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spin_lock(&dist->lock);
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/* Any additional pending interrupt? */
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if (vgic_dist_irq_get_level(vcpu, vlr.irq)) {
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vgic_cpu_irq_set(vcpu, vlr.irq);
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level_pending = true;
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} else {
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vgic_dist_irq_clear_pending(vcpu, vlr.irq);
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vgic_cpu_irq_clear(vcpu, vlr.irq);
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}
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level_pending |= process_level_irq(vcpu, lr, vlr);
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spin_unlock(&dist->lock);
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/*
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* Despite being EOIed, the LR may not have
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* been marked as empty.
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*/
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vgic_sync_lr_elrsr(vcpu, lr, vlr);
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}
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}
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