drm/amdgpu: add ELM/BAF support to dce_v11_0_pick_pll (v2)
New PLL scheme on ELM/BAF. v2: squash in pll fix. Plls are part of the phys. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
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@ -2385,6 +2385,44 @@ static u32 dce_v11_0_pick_pll(struct drm_crtc *crtc)
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u32 pll_in_use;
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int pll;
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if ((adev->asic_type == CHIP_ELLESMERE) ||
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(adev->asic_type == CHIP_BAFFIN)) {
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struct amdgpu_encoder *amdgpu_encoder =
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to_amdgpu_encoder(amdgpu_crtc->encoder);
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struct amdgpu_encoder_atom_dig *dig = amdgpu_encoder->enc_priv;
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if (ENCODER_MODE_IS_DP(amdgpu_atombios_encoder_get_encoder_mode(amdgpu_crtc->encoder)))
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return ATOM_DP_DTO;
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/* use the same PPLL for all monitors with the same clock */
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pll = amdgpu_pll_get_shared_nondp_ppll(crtc);
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if (pll != ATOM_PPLL_INVALID)
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return pll;
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switch (amdgpu_encoder->encoder_id) {
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case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
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if (dig->linkb)
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return ATOM_COMBOPHY_PLL1;
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else
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return ATOM_COMBOPHY_PLL0;
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break;
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case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
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if (dig->linkb)
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return ATOM_COMBOPHY_PLL3;
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else
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return ATOM_COMBOPHY_PLL2;
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break;
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case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
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if (dig->linkb)
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return ATOM_COMBOPHY_PLL5;
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else
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return ATOM_COMBOPHY_PLL4;
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break;
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default:
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DRM_ERROR("invalid encoder_id: 0x%x\n", amdgpu_encoder->encoder_id);
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return ATOM_PPLL_INVALID;
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}
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}
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if (ENCODER_MODE_IS_DP(amdgpu_atombios_encoder_get_encoder_mode(amdgpu_crtc->encoder))) {
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if (adev->clock.dp_extclk)
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/* skip PPLL programming if using ext clock */
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