cleanup IORESOURCE_CACHEABLE vs ioremap()
Quoting Arnd: I was thinking the opposite approach and basically removing all uses of IORESOURCE_CACHEABLE from the kernel. There are only a handful of them.and we can probably replace them all with hardcoded ioremap_cached() calls in the cases they are actually useful. All existing usages of IORESOURCE_CACHEABLE call ioremap() instead of ioremap_nocache() if the resource is cacheable, however ioremap() is uncached by default. Clearly none of the existing usages care about the cacheability. Particularly devm_ioremap_resource() never worked as advertised since it always fell back to plain ioremap(). Clean this up as the new direction we want is to convert ioremap_<type>() usages to memremap(..., flags). Suggested-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
This commit is contained in:
parent
2584cf8357
commit
92b19ff50e
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@ -95,7 +95,7 @@ static struct physmap_flash_data cdb89712_bootrom_pdata __initdata = {
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static struct resource cdb89712_bootrom_resources[] __initdata = {
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static struct resource cdb89712_bootrom_resources[] __initdata = {
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DEFINE_RES_NAMED(CS7_PHYS_BASE, SZ_128, "BOOTROM", IORESOURCE_MEM |
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DEFINE_RES_NAMED(CS7_PHYS_BASE, SZ_128, "BOOTROM", IORESOURCE_MEM |
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IORESOURCE_CACHEABLE | IORESOURCE_READONLY),
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IORESOURCE_READONLY),
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};
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};
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static struct platform_device cdb89712_bootrom_pdev __initdata = {
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static struct platform_device cdb89712_bootrom_pdev __initdata = {
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@ -102,7 +102,7 @@ static void of_pci_parse_addrs(struct device_node *node, struct pci_dev *dev)
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res = &dev->resource[(i - PCI_BASE_ADDRESS_0) >> 2];
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res = &dev->resource[(i - PCI_BASE_ADDRESS_0) >> 2];
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} else if (i == dev->rom_base_reg) {
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} else if (i == dev->rom_base_reg) {
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res = &dev->resource[PCI_ROM_RESOURCE];
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res = &dev->resource[PCI_ROM_RESOURCE];
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flags |= IORESOURCE_READONLY | IORESOURCE_CACHEABLE;
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flags |= IORESOURCE_READONLY;
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} else {
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} else {
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printk(KERN_ERR "PCI: bad cfg reg num 0x%x\n", i);
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printk(KERN_ERR "PCI: bad cfg reg num 0x%x\n", i);
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continue;
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continue;
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@ -231,8 +231,7 @@ static void pci_parse_of_addrs(struct platform_device *op,
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res = &dev->resource[(i - PCI_BASE_ADDRESS_0) >> 2];
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res = &dev->resource[(i - PCI_BASE_ADDRESS_0) >> 2];
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} else if (i == dev->rom_base_reg) {
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} else if (i == dev->rom_base_reg) {
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res = &dev->resource[PCI_ROM_RESOURCE];
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res = &dev->resource[PCI_ROM_RESOURCE];
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flags |= IORESOURCE_READONLY | IORESOURCE_CACHEABLE
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flags |= IORESOURCE_READONLY | IORESOURCE_SIZEALIGN;
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} else {
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} else {
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printk(KERN_ERR "PCI: bad cfg reg num 0x%x\n", i);
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printk(KERN_ERR "PCI: bad cfg reg num 0x%x\n", i);
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continue;
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continue;
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@ -326,8 +326,7 @@ static void pci_read_bases(struct pci_dev *dev, unsigned int howmany, int rom)
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struct resource *res = &dev->resource[PCI_ROM_RESOURCE];
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struct resource *res = &dev->resource[PCI_ROM_RESOURCE];
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dev->rom_base_reg = rom;
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dev->rom_base_reg = rom;
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res->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH |
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res->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH |
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IORESOURCE_READONLY | IORESOURCE_CACHEABLE |
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IORESOURCE_READONLY | IORESOURCE_SIZEALIGN;
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IORESOURCE_SIZEALIGN;
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__pci_read_base(dev, pci_bar_mem32, res, rom);
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__pci_read_base(dev, pci_bar_mem32, res, rom);
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}
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}
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}
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}
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@ -97,8 +97,6 @@ static int pnp_assign_mem(struct pnp_dev *dev, struct pnp_mem *rule, int idx)
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/* ??? rule->flags restricted to 8 bits, all tests bogus ??? */
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/* ??? rule->flags restricted to 8 bits, all tests bogus ??? */
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if (!(rule->flags & IORESOURCE_MEM_WRITEABLE))
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if (!(rule->flags & IORESOURCE_MEM_WRITEABLE))
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res->flags |= IORESOURCE_READONLY;
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res->flags |= IORESOURCE_READONLY;
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if (rule->flags & IORESOURCE_MEM_CACHEABLE)
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res->flags |= IORESOURCE_CACHEABLE;
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if (rule->flags & IORESOURCE_MEM_RANGELENGTH)
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if (rule->flags & IORESOURCE_MEM_RANGELENGTH)
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res->flags |= IORESOURCE_RANGELENGTH;
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res->flags |= IORESOURCE_RANGELENGTH;
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if (rule->flags & IORESOURCE_MEM_SHADOWABLE)
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if (rule->flags & IORESOURCE_MEM_SHADOWABLE)
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@ -100,12 +100,7 @@ static int asd_map_memio(struct asd_ha_struct *asd_ha)
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pci_name(asd_ha->pcidev));
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pci_name(asd_ha->pcidev));
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goto Err;
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goto Err;
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}
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}
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if (io_handle->flags & IORESOURCE_CACHEABLE)
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io_handle->addr = ioremap(io_handle->start, io_handle->len);
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io_handle->addr = ioremap(io_handle->start,
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io_handle->len);
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else
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io_handle->addr = ioremap_nocache(io_handle->start,
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io_handle->len);
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if (!io_handle->addr) {
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if (!io_handle->addr) {
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asd_printk("couldn't map MBAR%d of %s\n", i==0?0:1,
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asd_printk("couldn't map MBAR%d of %s\n", i==0?0:1,
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pci_name(asd_ha->pcidev));
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pci_name(asd_ha->pcidev));
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@ -259,10 +259,7 @@ static bool arcmsr_remap_pciregion(struct AdapterControlBlock *acb)
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addr = (unsigned long)pci_resource_start(pdev, 0);
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addr = (unsigned long)pci_resource_start(pdev, 0);
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range = pci_resource_len(pdev, 0);
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range = pci_resource_len(pdev, 0);
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flags = pci_resource_flags(pdev, 0);
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flags = pci_resource_flags(pdev, 0);
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if (flags & IORESOURCE_CACHEABLE)
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mem_base0 = ioremap(addr, range);
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mem_base0 = ioremap(addr, range);
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else
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mem_base0 = ioremap_nocache(addr, range);
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if (!mem_base0) {
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if (!mem_base0) {
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pr_notice("arcmsr%d: memory mapping region fail\n",
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pr_notice("arcmsr%d: memory mapping region fail\n",
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acb->host->host_no);
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acb->host->host_no);
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@ -324,13 +324,9 @@ int mvs_ioremap(struct mvs_info *mvi, int bar, int bar_ex)
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goto err_out;
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goto err_out;
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res_flag_ex = pci_resource_flags(pdev, bar_ex);
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res_flag_ex = pci_resource_flags(pdev, bar_ex);
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if (res_flag_ex & IORESOURCE_MEM) {
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if (res_flag_ex & IORESOURCE_MEM)
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if (res_flag_ex & IORESOURCE_CACHEABLE)
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mvi->regs_ex = ioremap(res_start, res_len);
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mvi->regs_ex = ioremap(res_start, res_len);
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else
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else
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mvi->regs_ex = ioremap_nocache(res_start,
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res_len);
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} else
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mvi->regs_ex = (void *)res_start;
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mvi->regs_ex = (void *)res_start;
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if (!mvi->regs_ex)
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if (!mvi->regs_ex)
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goto err_out;
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goto err_out;
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@ -342,10 +338,7 @@ int mvs_ioremap(struct mvs_info *mvi, int bar, int bar_ex)
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goto err_out;
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goto err_out;
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res_flag = pci_resource_flags(pdev, bar);
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res_flag = pci_resource_flags(pdev, bar);
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if (res_flag & IORESOURCE_CACHEABLE)
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mvi->regs = ioremap(res_start, res_len);
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mvi->regs = ioremap(res_start, res_len);
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else
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mvi->regs = ioremap_nocache(res_start, res_len);
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if (!mvi->regs) {
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if (!mvi->regs) {
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if (mvi->regs_ex && (res_flag_ex & IORESOURCE_MEM))
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if (mvi->regs_ex && (res_flag_ex & IORESOURCE_MEM))
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@ -325,7 +325,6 @@ static int ocfb_probe(struct platform_device *pdev)
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dev_err(&pdev->dev, "I/O resource request failed\n");
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dev_err(&pdev->dev, "I/O resource request failed\n");
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return -ENXIO;
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return -ENXIO;
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}
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}
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res->flags &= ~IORESOURCE_CACHEABLE;
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fbdev->regs = devm_ioremap_resource(&pdev->dev, res);
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fbdev->regs = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(fbdev->regs))
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if (IS_ERR(fbdev->regs))
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return PTR_ERR(fbdev->regs);
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return PTR_ERR(fbdev->regs);
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13
lib/devres.c
13
lib/devres.c
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@ -119,10 +119,9 @@ EXPORT_SYMBOL(devm_iounmap);
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* @dev: generic device to handle the resource for
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* @dev: generic device to handle the resource for
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* @res: resource to be handled
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* @res: resource to be handled
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*
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*
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* Checks that a resource is a valid memory region, requests the memory region
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* Checks that a resource is a valid memory region, requests the memory
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* and ioremaps it either as cacheable or as non-cacheable memory depending on
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* region and ioremaps it. All operations are managed and will be undone
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* the resource's flags. All operations are managed and will be undone on
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* on driver detach.
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* driver detach.
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*
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*
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* Returns a pointer to the remapped memory or an ERR_PTR() encoded error code
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* Returns a pointer to the remapped memory or an ERR_PTR() encoded error code
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* on failure. Usage example:
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* on failure. Usage example:
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@ -153,11 +152,7 @@ void __iomem *devm_ioremap_resource(struct device *dev, struct resource *res)
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return IOMEM_ERR_PTR(-EBUSY);
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return IOMEM_ERR_PTR(-EBUSY);
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}
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}
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if (res->flags & IORESOURCE_CACHEABLE)
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dest_ptr = devm_ioremap(dev, res->start, size);
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dest_ptr = devm_ioremap(dev, res->start, size);
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else
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dest_ptr = devm_ioremap_nocache(dev, res->start, size);
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if (!dest_ptr) {
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if (!dest_ptr) {
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dev_err(dev, "ioremap failed for resource %pR\n", res);
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dev_err(dev, "ioremap failed for resource %pR\n", res);
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devm_release_mem_region(dev, res->start, size);
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devm_release_mem_region(dev, res->start, size);
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@ -41,11 +41,8 @@ void __iomem *pci_iomap_range(struct pci_dev *dev,
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len = maxlen;
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len = maxlen;
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if (flags & IORESOURCE_IO)
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if (flags & IORESOURCE_IO)
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return __pci_ioport_map(dev, start, len);
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return __pci_ioport_map(dev, start, len);
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if (flags & IORESOURCE_MEM) {
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if (flags & IORESOURCE_MEM)
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if (flags & IORESOURCE_CACHEABLE)
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return ioremap(start, len);
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return ioremap(start, len);
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return ioremap_nocache(start, len);
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}
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/* What? */
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/* What? */
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return NULL;
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return NULL;
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}
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}
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