From 92f4beb718d76e93b76343a3ba872df6cb210672 Mon Sep 17 00:00:00 2001 From: Keyon Jie Date: Fri, 25 Oct 2019 17:41:07 -0500 Subject: [PATCH] ASoC: SOF: Intel: HDA: use macro for register polling retry count Define macro and use it for the register polling retry count. Signed-off-by: Keyon Jie Signed-off-by: Pierre-Louis Bossart Link: https://lore.kernel.org/r/20191025224122.7718-12-pierre-louis.bossart@linux.intel.com Signed-off-by: Mark Brown --- sound/soc/sof/intel/hda-dsp.c | 6 ++---- sound/soc/sof/intel/hda.h | 1 + 2 files changed, 3 insertions(+), 4 deletions(-) diff --git a/sound/soc/sof/intel/hda-dsp.c b/sound/soc/sof/intel/hda-dsp.c index 74805a066183..936361bd25e9 100644 --- a/sound/soc/sof/intel/hda-dsp.c +++ b/sound/soc/sof/intel/hda-dsp.c @@ -323,12 +323,11 @@ int hda_dsp_set_power_state(struct snd_sof_dev *sdev, enum sof_d0_substate d0_substate) { struct hdac_bus *bus = sof_to_bus(sdev); - int retry = 50; int ret; u8 value; /* Write to D0I3C after Command-In-Progress bit is cleared */ - ret = hda_dsp_wait_d0i3c_done(sdev, retry); + ret = hda_dsp_wait_d0i3c_done(sdev, HDA_DSP_REG_POLL_RETRY_COUNT); if (ret < 0) { dev_err(bus->dev, "CIP timeout before D0I3C update!\n"); return ret; @@ -339,8 +338,7 @@ int hda_dsp_set_power_state(struct snd_sof_dev *sdev, snd_hdac_chip_updateb(bus, VS_D0I3C, SOF_HDA_VS_D0I3C_I3, value); /* Wait for cmd in progress to be cleared before exiting the function */ - retry = 50; - ret = hda_dsp_wait_d0i3c_done(sdev, retry); + ret = hda_dsp_wait_d0i3c_done(sdev, HDA_DSP_REG_POLL_RETRY_COUNT); if (ret < 0) { dev_err(bus->dev, "CIP timeout after D0I3C update!\n"); return ret; diff --git a/sound/soc/sof/intel/hda.h b/sound/soc/sof/intel/hda.h index 0e7c366b8f71..99ec60218c16 100644 --- a/sound/soc/sof/intel/hda.h +++ b/sound/soc/sof/intel/hda.h @@ -214,6 +214,7 @@ #define HDA_DSP_CTRL_RESET_TIMEOUT 100 #define HDA_DSP_WAIT_TIMEOUT 500 /* 500 msec */ #define HDA_DSP_REG_POLL_INTERVAL_US 500 /* 0.5 msec */ +#define HDA_DSP_REG_POLL_RETRY_COUNT 50 #define HDA_DSP_ADSPIC_IPC 1 #define HDA_DSP_ADSPIS_IPC 1