drm/i915: Introduce FBC DocBook.
No functional changes. v2 (Paulo): Rebase. v3: Accept Daniel's suggestions: * remove unclear and duplicated explanation. * remove marketing like doc and replace by a simple one. * remove bdw_fbc_sw_flush documentation. Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -3924,6 +3924,11 @@ int num_ioctls;</synopsis>
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<title>Panel Self Refresh PSR (PSR/SRD)</title>
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!Pdrivers/gpu/drm/i915/intel_psr.c Panel Self Refresh (PSR/SRD)
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!Idrivers/gpu/drm/i915/intel_psr.c
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</sect2>
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<sect2>
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<title>Frame Buffer Compression (FBC)</title>
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!Pdrivers/gpu/drm/i915/intel_fbc.c Frame Buffer Compression (FBC)
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!Idrivers/gpu/drm/i915/intel_fbc.c
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</sect2>
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<sect2>
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<title>DPIO</title>
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@ -21,20 +21,26 @@
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* DEALINGS IN THE SOFTWARE.
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*/
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#include "intel_drv.h"
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#include "i915_drv.h"
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/* FBC, or Frame Buffer Compression, is a technique employed to compress the
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* framebuffer contents in-memory, aiming at reducing the required bandwidth
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* during in-memory transfers and, therefore, reduce the power packet.
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/**
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* DOC: Frame Buffer Compression (FBC)
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*
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* FBC tries to save memory bandwidth (and so power consumption) by
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* compressing the amount of memory used by the display. It is total
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* transparent to user space and completely handled in the kernel.
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*
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* The benefits of FBC are mostly visible with solid backgrounds and
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* variation-less patterns.
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* variation-less patterns. It comes from keeping the memory footprint small
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* and having fewer memory pages opened and accessed for refreshing the display.
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*
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* FBC-related functionality can be enabled by the means of the
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* i915.i915_fbc_enable parameter
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* i915 is responsible to reserve stolen memory for FBC and configure its
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* offset on proper registers. The hardware takes care of all
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* compress/decompress. However there are many known cases where we have to
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* forcibly disable it to allow proper screen updates.
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*/
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#include "intel_drv.h"
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#include "i915_drv.h"
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static void i8xx_fbc_disable(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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@ -318,6 +324,14 @@ static void gen7_fbc_enable(struct drm_crtc *crtc)
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DRM_DEBUG_KMS("enabled fbc on plane %c\n", plane_name(intel_crtc->plane));
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}
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/**
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* intel_fbc_enabled - Is FBC enabled?
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* @dev: the drm_device
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*
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* This function is used to verify the current state of FBC.
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* FIXME: This should be tracked in the plane config eventually
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* instead of queried at runtime for most callers.
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*/
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bool intel_fbc_enabled(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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@ -429,6 +443,12 @@ static void intel_fbc_enable(struct drm_crtc *crtc)
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schedule_delayed_work(&work->work, msecs_to_jiffies(50));
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}
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/**
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* intel_fbc_disable - disable FBC
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* @dev: the drm_device
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*
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* This function disables FBC.
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*/
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void intel_fbc_disable(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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@ -643,6 +663,12 @@ void intel_fbc_update(struct drm_device *dev)
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i915_gem_stolen_cleanup_compression(dev);
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}
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/**
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* intel_fbc_init - Initialize FBC
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* @dev_priv: the i915 device
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*
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* This function might be called during PM init process.
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*/
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void intel_fbc_init(struct drm_i915_private *dev_priv)
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{
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if (!HAS_FBC(dev_priv)) {
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