ASoC: jz4740: Add jz4780 support
The jz4780 and jz4740 have very similar i2s blocks. The slight difference is in Rx/Tx fifos. And the bitclocks for input/output are different. This patch adds jz4780 support to the driver Signed-off-by: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> Acked-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -1,7 +1,7 @@
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Ingenic JZ4740 I2S controller
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Required properties:
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- compatible : "ingenic,jz4740-i2s"
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- compatible : "ingenic,jz4740-i2s" or "ingenic,jz4780-i2s"
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- reg : I2S registers location and length
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- clocks : AIC and I2S PLL clock specifiers.
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- clock-names: "aic" and "i2s"
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@ -58,6 +58,12 @@
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#define JZ_AIC_CONF_FIFO_RX_THRESHOLD_OFFSET 12
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#define JZ_AIC_CONF_FIFO_TX_THRESHOLD_OFFSET 8
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#define JZ4780_AIC_CONF_FIFO_RX_THRESHOLD_OFFSET 24
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#define JZ4780_AIC_CONF_FIFO_TX_THRESHOLD_OFFSET 16
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#define JZ4780_AIC_CONF_FIFO_RX_THRESHOLD_MASK \
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(0xf << JZ4780_AIC_CONF_FIFO_RX_THRESHOLD_OFFSET)
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#define JZ4780_AIC_CONF_FIFO_TX_THRESHOLD_MASK \
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(0x1f << JZ4780_AIC_CONF_FIFO_TX_THRESHOLD_OFFSET)
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#define JZ_AIC_CTRL_OUTPUT_SAMPLE_SIZE_MASK (0x7 << 19)
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#define JZ_AIC_CTRL_INPUT_SAMPLE_SIZE_MASK (0x7 << 16)
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@ -79,6 +85,7 @@
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#define JZ_AIC_CTRL_INPUT_SAMPLE_SIZE_OFFSET 16
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#define JZ_AIC_I2S_FMT_DISABLE_BIT_CLK BIT(12)
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#define JZ_AIC_I2S_FMT_DISABLE_BIT_ICLK BIT(13)
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#define JZ_AIC_I2S_FMT_ENABLE_SYS_CLK BIT(4)
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#define JZ_AIC_I2S_FMT_MSB BIT(0)
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@ -87,6 +94,13 @@
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#define JZ_AIC_CLK_DIV_MASK 0xf
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#define I2SDIV_DV_SHIFT 8
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#define I2SDIV_DV_MASK (0xf << I2SDIV_DV_SHIFT)
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#define I2SDIV_IDV_SHIFT 8
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#define I2SDIV_IDV_MASK (0xf << I2SDIV_IDV_SHIFT)
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enum jz47xx_i2s_version {
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JZ_I2S_JZ4740,
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JZ_I2S_JZ4780,
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};
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struct jz4740_i2s {
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struct resource *mem;
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@ -98,6 +112,8 @@ struct jz4740_i2s {
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struct snd_dmaengine_dai_dma_data playback_dma_data;
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struct snd_dmaengine_dai_dma_data capture_dma_data;
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enum jz47xx_i2s_version version;
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};
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static inline uint32_t jz4740_i2s_read(const struct jz4740_i2s *i2s,
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@ -267,13 +283,22 @@ static int jz4740_i2s_hw_params(struct snd_pcm_substream *substream,
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ctrl |= JZ_AIC_CTRL_MONO_TO_STEREO;
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else
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ctrl &= ~JZ_AIC_CTRL_MONO_TO_STEREO;
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div_reg &= ~I2SDIV_DV_MASK;
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div_reg |= (div - 1) << I2SDIV_DV_SHIFT;
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} else {
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ctrl &= ~JZ_AIC_CTRL_INPUT_SAMPLE_SIZE_MASK;
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ctrl |= sample_size << JZ_AIC_CTRL_INPUT_SAMPLE_SIZE_OFFSET;
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if (i2s->version >= JZ_I2S_JZ4780) {
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div_reg &= ~I2SDIV_IDV_MASK;
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div_reg |= (div - 1) << I2SDIV_IDV_SHIFT;
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} else {
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div_reg &= ~I2SDIV_DV_MASK;
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div_reg |= (div - 1) << I2SDIV_DV_SHIFT;
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}
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}
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div_reg &= ~I2SDIV_DV_MASK;
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div_reg |= (div - 1) << I2SDIV_DV_SHIFT;
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jz4740_i2s_write(i2s, JZ_REG_AIC_CTRL, ctrl);
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jz4740_i2s_write(i2s, JZ_REG_AIC_CLK_DIV, div_reg);
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@ -369,11 +394,19 @@ static int jz4740_i2s_dai_probe(struct snd_soc_dai *dai)
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snd_soc_dai_init_dma_data(dai, &i2s->playback_dma_data,
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&i2s->capture_dma_data);
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conf = (7 << JZ_AIC_CONF_FIFO_RX_THRESHOLD_OFFSET) |
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(8 << JZ_AIC_CONF_FIFO_TX_THRESHOLD_OFFSET) |
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JZ_AIC_CONF_OVERFLOW_PLAY_LAST |
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JZ_AIC_CONF_I2S |
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JZ_AIC_CONF_INTERNAL_CODEC;
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if (i2s->version >= JZ_I2S_JZ4780) {
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conf = (7 << JZ4780_AIC_CONF_FIFO_RX_THRESHOLD_OFFSET) |
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(8 << JZ4780_AIC_CONF_FIFO_TX_THRESHOLD_OFFSET) |
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JZ_AIC_CONF_OVERFLOW_PLAY_LAST |
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JZ_AIC_CONF_I2S |
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JZ_AIC_CONF_INTERNAL_CODEC;
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} else {
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conf = (7 << JZ_AIC_CONF_FIFO_RX_THRESHOLD_OFFSET) |
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(8 << JZ_AIC_CONF_FIFO_TX_THRESHOLD_OFFSET) |
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JZ_AIC_CONF_OVERFLOW_PLAY_LAST |
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JZ_AIC_CONF_I2S |
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JZ_AIC_CONF_INTERNAL_CODEC;
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}
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jz4740_i2s_write(i2s, JZ_REG_AIC_CONF, JZ_AIC_CONF_RESET);
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jz4740_i2s_write(i2s, JZ_REG_AIC_CONF, conf);
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@ -422,13 +455,34 @@ static struct snd_soc_dai_driver jz4740_i2s_dai = {
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.resume = jz4740_i2s_resume,
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};
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static struct snd_soc_dai_driver jz4780_i2s_dai = {
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.probe = jz4740_i2s_dai_probe,
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.remove = jz4740_i2s_dai_remove,
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.playback = {
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.channels_min = 1,
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.channels_max = 2,
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.rates = SNDRV_PCM_RATE_8000_48000,
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.formats = JZ4740_I2S_FMTS,
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},
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.capture = {
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.channels_min = 2,
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.channels_max = 2,
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.rates = SNDRV_PCM_RATE_8000_48000,
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.formats = JZ4740_I2S_FMTS,
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},
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.ops = &jz4740_i2s_dai_ops,
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.suspend = jz4740_i2s_suspend,
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.resume = jz4740_i2s_resume,
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};
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static const struct snd_soc_component_driver jz4740_i2s_component = {
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.name = "jz4740-i2s",
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};
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#ifdef CONFIG_OF
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static const struct of_device_id jz4740_of_matches[] = {
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{ .compatible = "ingenic,jz4740-i2s" },
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{ .compatible = "ingenic,jz4740-i2s", .data = (void *)JZ_I2S_JZ4740 },
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{ .compatible = "ingenic,jz4780-i2s", .data = (void *)JZ_I2S_JZ4780 },
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{ /* sentinel */ }
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};
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#endif
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@ -438,11 +492,16 @@ static int jz4740_i2s_dev_probe(struct platform_device *pdev)
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struct jz4740_i2s *i2s;
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struct resource *mem;
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int ret;
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const struct of_device_id *match;
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i2s = devm_kzalloc(&pdev->dev, sizeof(*i2s), GFP_KERNEL);
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if (!i2s)
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return -ENOMEM;
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match = of_match_device(jz4740_of_matches, &pdev->dev);
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if (match)
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i2s->version = (enum jz47xx_i2s_version)match->data;
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mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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i2s->base = devm_ioremap_resource(&pdev->dev, mem);
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if (IS_ERR(i2s->base))
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@ -460,8 +519,13 @@ static int jz4740_i2s_dev_probe(struct platform_device *pdev)
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platform_set_drvdata(pdev, i2s);
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ret = devm_snd_soc_register_component(&pdev->dev,
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&jz4740_i2s_component, &jz4740_i2s_dai, 1);
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if (i2s->version == JZ_I2S_JZ4780)
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ret = devm_snd_soc_register_component(&pdev->dev,
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&jz4740_i2s_component, &jz4780_i2s_dai, 1);
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else
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ret = devm_snd_soc_register_component(&pdev->dev,
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&jz4740_i2s_component, &jz4740_i2s_dai, 1);
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if (ret)
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return ret;
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