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ARM: OMAP2+: PRCM and hwmod changes for v4.3 

This series adds:
 
 - I/O wakeup support for AM43xx
 - register lock and unlock support to the hwmod code (needed for the RTC
   IP blocks on some chips)
 - several fixes for sparse warnings and an unnecessary null pointer test
 - a DRA7xx clockdomain configuration workaround, to deal with some hardware
   bugs
 
 Basic build, boot, and PM tests are here:
 
 http://www.pwsan.com/omap/testlogs/hwmod-prcm-for-v4.3/20150723080012/
 
 Since I do not have an AM43xx or DRA7xx device, I can't test on those
 platforms.
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Merge tag 'for-v4.3/omap-hwmod-prcm-a' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v4.3/soc

ARM: OMAP2+: PRCM and hwmod changes for v4.3

This series adds:

- I/O wakeup support for AM43xx
- register lock and unlock support to the hwmod code (needed for the RTC
  IP blocks on some chips)
- several fixes for sparse warnings and an unnecessary null pointer test
- a DRA7xx clockdomain configuration workaround, to deal with some hardware
  bugs

Basic build, boot, and PM tests are here:

http://www.pwsan.com/omap/testlogs/hwmod-prcm-for-v4.3/20150723080012/

Since I do not have an AM43xx or DRA7xx device, I can't test on those
platforms.
This commit is contained in:
Tony Lindgren 2015-07-23 21:14:02 -07:00
parent 228e5fadba 3b86616e30
commit 97d9a3d096
16 changed files with 92 additions and 50 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm/boot/dts/am4372.dtsi
View File

@ -86,6 +86,7 @@ l4_wkup: l4_wkup@44c00000 {
prcm: prcm@1f0000 {
compatible = "ti,am4-prcm";
reg = <0x1f0000 0x11000>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
prcm_clocks: clocks {
#address-cells = <1>;

2
arch/arm/mach-omap2/clockdomains7xx_data.c
View File

@ -331,7 +331,7 @@ static struct clockdomain l4per2_7xx_clkdm = {
.dep_bit = DRA7XX_L4PER2_STATDEP_SHIFT,
.wkdep_srcs = l4per2_wkup_sleep_deps,
.sleepdep_srcs = l4per2_wkup_sleep_deps,
.flags = CLKDM_CAN_HWSUP_SWSUP,
.flags = CLKDM_CAN_SWSUP,
};
static struct clockdomain mpu0_7xx_clkdm = {

2
arch/arm/mach-omap2/omap-mpuss-lowpower.c
View File

@ -105,7 +105,7 @@ static void dummy_cpu_resume(void)
static void dummy_scu_prepare(unsigned int cpu_id, unsigned int cpu_state)
{}
struct cpu_pm_ops omap_pm_ops = {
static struct cpu_pm_ops omap_pm_ops = {
.finish_suspend = default_finish_suspend,
.resume = dummy_cpu_resume,
.scu_prepare = dummy_scu_prepare,

1
arch/arm/mach-omap2/omap3-restart.c
View File

@ -14,6 +14,7 @@
#include <linux/init.h>
#include <linux/reboot.h>
#include "common.h"
#include "control.h"
#include "prm.h"

1
arch/arm/mach-omap2/omap4-restart.c
View File

@ -9,6 +9,7 @@
#include <linux/types.h>
#include <linux/reboot.h>
#include "common.h"
#include "prm.h"
/**

13
arch/arm/mach-omap2/omap_hwmod.c
View File

@ -299,7 +299,20 @@ static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
/* Module might have lost context, always update cache and register */
oh->_sysc_cache = v;
/*
* Some IP blocks (such as RTC) require unlocking of IP before
* accessing its registers. If a function pointer is present
* to unlock, then call it before accessing sysconfig and
* call lock after writing sysconfig.
*/
if (oh->class->unlock)
oh->class->unlock(oh);
omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
if (oh->class->lock)
oh->class->lock(oh);
}
/**

4
arch/arm/mach-omap2/omap_hwmod.h
View File

@ -576,6 +576,8 @@ struct omap_hwmod_omap4_prcm {
* @pre_shutdown: ptr to fn to be executed immediately prior to device shutdown
* @reset: ptr to fn to be executed in place of the standard hwmod reset fn
* @enable_preprogram: ptr to fn to be executed during device enable
* @lock: ptr to fn to be executed to lock IP registers
* @unlock: ptr to fn to be executed to unlock IP registers
*
* Represent the class of a OMAP hardware "modules" (e.g. timer,
* smartreflex, gpio, uart...)
@ -600,6 +602,8 @@ struct omap_hwmod_class {
int (*pre_shutdown)(struct omap_hwmod *oh);
int (*reset)(struct omap_hwmod *oh);
int (*enable_preprogram)(struct omap_hwmod *oh);
void (*lock)(struct omap_hwmod *oh);
void (*unlock)(struct omap_hwmod *oh);
};
/**

2
arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
View File

@ -20,7 +20,7 @@
#include "prm-regbits-24xx.h"
#include "wd_timer.h"
struct omap_hwmod_dma_info omap2xxx_dss_sdma_chs[] = {
static struct omap_hwmod_dma_info omap2xxx_dss_sdma_chs[] = {
{ .name = "dispc", .dma_req = 5 },
{ .dma_req = -1, },
};

2
arch/arm/mach-omap2/omap_hwmod_43xx_data.c
View File

@ -480,7 +480,7 @@ static struct omap_hwmod am43xx_dss_core_hwmod = {
/* dispc */
struct omap_dss_dispc_dev_attr am43xx_dss_dispc_dev_attr = {
static struct omap_dss_dispc_dev_attr am43xx_dss_dispc_dev_attr = {
.manager_count = 1,
.has_framedonetv_irq = 0
};

34
arch/arm/mach-omap2/omap_hwmod_81xx_data.c
View File

@ -488,7 +488,7 @@ static struct omap_hwmod dm81xx_gpmc_hwmod = {
},
};
struct omap_hwmod_ocp_if dm81xx_alwon_l3_slow__gpmc = {
static struct omap_hwmod_ocp_if dm81xx_alwon_l3_slow__gpmc = {
.master = &dm816x_alwon_l3_slow_hwmod,
.slave = &dm81xx_gpmc_hwmod,
.user = OCP_USER_MPU,
@ -729,7 +729,7 @@ static struct omap_hwmod_class dm816x_mdio_hwmod_class = {
.sysc = &dm816x_emac_sysc,
};
struct omap_hwmod dm816x_emac0_mdio_hwmod = {
static struct omap_hwmod dm816x_emac0_mdio_hwmod = {
.name = "davinci_mdio",
.class = &dm816x_mdio_hwmod_class,
.clkdm_name = "alwon_ethernet_clkdm",
@ -747,7 +747,7 @@ struct omap_hwmod dm816x_emac0_mdio_hwmod = {
},
};
struct omap_hwmod_ocp_if dm816x_emac0__mdio = {
static struct omap_hwmod_ocp_if dm816x_emac0__mdio = {
.master = &dm816x_l4_hs_hwmod,
.slave = &dm816x_emac0_mdio_hwmod,
.user = OCP_USER_MPU,
@ -902,7 +902,7 @@ static struct omap_hwmod_class dm816x_tpcc_hwmod_class = {
.name = "tpcc",
};
struct omap_hwmod dm816x_tpcc_hwmod = {
static struct omap_hwmod dm816x_tpcc_hwmod = {
.name = "tpcc",
.class = &dm816x_tpcc_hwmod_class,
.clkdm_name = "alwon_l3s_clkdm",
@ -915,7 +915,7 @@ struct omap_hwmod dm816x_tpcc_hwmod = {
},
};
struct omap_hwmod_ocp_if dm816x_alwon_l3_fast__tpcc = {
static struct omap_hwmod_ocp_if dm816x_alwon_l3_fast__tpcc = {
.master = &dm816x_alwon_l3_fast_hwmod,
.slave = &dm816x_tpcc_hwmod,
.clk = "sysclk4_ck",
@ -935,7 +935,7 @@ static struct omap_hwmod_class dm816x_tptc0_hwmod_class = {
.name = "tptc0",
};
struct omap_hwmod dm816x_tptc0_hwmod = {
static struct omap_hwmod dm816x_tptc0_hwmod = {
.name = "tptc0",
.class = &dm816x_tptc0_hwmod_class,
.clkdm_name = "alwon_l3s_clkdm",
@ -948,7 +948,7 @@ struct omap_hwmod dm816x_tptc0_hwmod = {
},
};
struct omap_hwmod_ocp_if dm816x_alwon_l3_fast__tptc0 = {
static struct omap_hwmod_ocp_if dm816x_alwon_l3_fast__tptc0 = {
.master = &dm816x_alwon_l3_fast_hwmod,
.slave = &dm816x_tptc0_hwmod,
.clk = "sysclk4_ck",
@ -956,7 +956,7 @@ struct omap_hwmod_ocp_if dm816x_alwon_l3_fast__tptc0 = {
.user = OCP_USER_MPU,
};
struct omap_hwmod_ocp_if dm816x_tptc0__alwon_l3_fast = {
static struct omap_hwmod_ocp_if dm816x_tptc0__alwon_l3_fast = {
.master = &dm816x_tptc0_hwmod,
.slave = &dm816x_alwon_l3_fast_hwmod,
.clk = "sysclk4_ck",
@ -977,7 +977,7 @@ static struct omap_hwmod_class dm816x_tptc1_hwmod_class = {
.name = "tptc1",
};
struct omap_hwmod dm816x_tptc1_hwmod = {
static struct omap_hwmod dm816x_tptc1_hwmod = {
.name = "tptc1",
.class = &dm816x_tptc1_hwmod_class,
.clkdm_name = "alwon_l3s_clkdm",
@ -990,7 +990,7 @@ struct omap_hwmod dm816x_tptc1_hwmod = {
},
};
struct omap_hwmod_ocp_if dm816x_alwon_l3_fast__tptc1 = {
static struct omap_hwmod_ocp_if dm816x_alwon_l3_fast__tptc1 = {
.master = &dm816x_alwon_l3_fast_hwmod,
.slave = &dm816x_tptc1_hwmod,
.clk = "sysclk4_ck",
@ -998,7 +998,7 @@ struct omap_hwmod_ocp_if dm816x_alwon_l3_fast__tptc1 = {
.user = OCP_USER_MPU,
};
struct omap_hwmod_ocp_if dm816x_tptc1__alwon_l3_fast = {
static struct omap_hwmod_ocp_if dm816x_tptc1__alwon_l3_fast = {
.master = &dm816x_tptc1_hwmod,
.slave = &dm816x_alwon_l3_fast_hwmod,
.clk = "sysclk4_ck",
@ -1019,7 +1019,7 @@ static struct omap_hwmod_class dm816x_tptc2_hwmod_class = {
.name = "tptc2",
};
struct omap_hwmod dm816x_tptc2_hwmod = {
static struct omap_hwmod dm816x_tptc2_hwmod = {
.name = "tptc2",
.class = &dm816x_tptc2_hwmod_class,
.clkdm_name = "alwon_l3s_clkdm",
@ -1032,7 +1032,7 @@ struct omap_hwmod dm816x_tptc2_hwmod = {
},
};
struct omap_hwmod_ocp_if dm816x_alwon_l3_fast__tptc2 = {
static struct omap_hwmod_ocp_if dm816x_alwon_l3_fast__tptc2 = {
.master = &dm816x_alwon_l3_fast_hwmod,
.slave = &dm816x_tptc2_hwmod,
.clk = "sysclk4_ck",
@ -1040,7 +1040,7 @@ struct omap_hwmod_ocp_if dm816x_alwon_l3_fast__tptc2 = {
.user = OCP_USER_MPU,
};
struct omap_hwmod_ocp_if dm816x_tptc2__alwon_l3_fast = {
static struct omap_hwmod_ocp_if dm816x_tptc2__alwon_l3_fast = {
.master = &dm816x_tptc2_hwmod,
.slave = &dm816x_alwon_l3_fast_hwmod,
.clk = "sysclk4_ck",
@ -1061,7 +1061,7 @@ static struct omap_hwmod_class dm816x_tptc3_hwmod_class = {
.name = "tptc3",
};
struct omap_hwmod dm816x_tptc3_hwmod = {
static struct omap_hwmod dm816x_tptc3_hwmod = {
.name = "tptc3",
.class = &dm816x_tptc3_hwmod_class,
.clkdm_name = "alwon_l3s_clkdm",
@ -1074,7 +1074,7 @@ struct omap_hwmod dm816x_tptc3_hwmod = {
},
};
struct omap_hwmod_ocp_if dm816x_alwon_l3_fast__tptc3 = {
static struct omap_hwmod_ocp_if dm816x_alwon_l3_fast__tptc3 = {
.master = &dm816x_alwon_l3_fast_hwmod,
.slave = &dm816x_tptc3_hwmod,
.clk = "sysclk4_ck",
@ -1082,7 +1082,7 @@ struct omap_hwmod_ocp_if dm816x_alwon_l3_fast__tptc3 = {
.user = OCP_USER_MPU,
};
struct omap_hwmod_ocp_if dm816x_tptc3__alwon_l3_fast = {
static struct omap_hwmod_ocp_if dm816x_tptc3__alwon_l3_fast = {
.master = &dm816x_tptc3_hwmod,
.slave = &dm816x_alwon_l3_fast_hwmod,
.clk = "sysclk4_ck",

6
arch/arm/mach-omap2/pdata-quirks.c
View File

@ -31,7 +31,7 @@ struct pdata_init {
void (*fn)(void);
};
struct of_dev_auxdata omap_auxdata_lookup[];
static struct of_dev_auxdata omap_auxdata_lookup[];
static struct twl4030_gpio_platform_data twl_gpio_auxdata;
#ifdef CONFIG_MACH_NOKIA_N8X0
@ -128,7 +128,7 @@ static void __init omap3_sbc_t3530_legacy_init(void)
omap3_sbc_t3x_usb_hub_init(167, "sb-t35 usb hub");
}
struct ti_st_plat_data wilink_pdata = {
static struct ti_st_plat_data wilink_pdata = {
.nshutdown_gpio = 137,
.dev_name = "/dev/ttyO1",
.flow_cntrl = 1,
@ -323,7 +323,7 @@ static struct pdata_init auxdata_quirks[] __initdata = {
{ /* sentinel */ },
};
struct of_dev_auxdata omap_auxdata_lookup[] __initdata = {
static struct of_dev_auxdata omap_auxdata_lookup[] __initdata = {
#ifdef CONFIG_MACH_NOKIA_N8X0
OF_DEV_AUXDATA("ti,omap2420-mmc", 0x4809c000, "mmci-omap.0", NULL),
OF_DEV_AUXDATA("menelaus", 0x72, "1-0072", &n8x0_menelaus_platform_data),

2
arch/arm/mach-omap2/prcm-common.h
View File

@ -472,6 +472,7 @@ struct omap_prcm_irq {
* struct omap_prcm_irq_setup - PRCM interrupt controller details
* @ack: PRM register offset for the first PRM_IRQSTATUS_MPU register
* @mask: PRM register offset for the first PRM_IRQENABLE_MPU register
* @pm_ctrl: PRM register offset for the PRM_IO_PMCTRL register
* @nr_regs: number of PRM_IRQ{STATUS,ENABLE}_MPU* registers
* @nr_irqs: number of entries in the @irqs array
* @irqs: ptr to an array of PRCM interrupt bits (see @nr_irqs)
@ -494,6 +495,7 @@ struct omap_prcm_irq {
struct omap_prcm_irq_setup {
u16 ack;
u16 mask;
u16 pm_ctrl;
u8 nr_regs;
u8 nr_irqs;
const struct omap_prcm_irq *irqs;

7
arch/arm/mach-omap2/prcm43xx.h
View File

@ -25,6 +25,13 @@
#define AM43XX_PRM_WKUP_INST 0x2000
#define AM43XX_PRM_DEVICE_INST 0x4000
/* PRM_IRQ offsets */
#define AM43XX_PRM_IRQSTATUS_MPU_OFFSET 0x0004
#define AM43XX_PRM_IRQENABLE_MPU_OFFSET 0x0008
/* Other PRM offsets */
#define AM43XX_PRM_IO_PMCTRL_OFFSET 0x0024
/* RM RSTCTRL offsets */
#define AM43XX_RM_PER_RSTCTRL_OFFSET 0x0010
#define AM43XX_RM_GFX_RSTCTRL_OFFSET 0x0010

61
arch/arm/mach-omap2/prm44xx.c
View File

@ -18,13 +18,14 @@
#include <linux/err.h>
#include <linux/io.h>
#include <linux/of_irq.h>
#include <linux/of.h>
#include "soc.h"
#include "iomap.h"
#include "common.h"
#include "vp.h"
#include "prm44xx.h"
#include "prcm43xx.h"
#include "prm-regbits-44xx.h"
#include "prcm44xx.h"
#include "prminst44xx.h"
@ -45,6 +46,7 @@ static const struct omap_prcm_irq omap4_prcm_irqs[] = {
static struct omap_prcm_irq_setup omap4_prcm_irq_setup = {
.ack = OMAP4_PRM_IRQSTATUS_MPU_OFFSET,
.mask = OMAP4_PRM_IRQENABLE_MPU_OFFSET,
.pm_ctrl = OMAP4_PRM_IO_PMCTRL_OFFSET,
.nr_regs = 2,
.irqs = omap4_prcm_irqs,
.nr_irqs = ARRAY_SIZE(omap4_prcm_irqs),
@ -216,11 +218,11 @@ static inline u32 _read_pending_irq_reg(u16 irqen_offs, u16 irqst_offs)
*/
static void omap44xx_prm_read_pending_irqs(unsigned long *events)
{
events[0] = _read_pending_irq_reg(OMAP4_PRM_IRQENABLE_MPU_OFFSET,
OMAP4_PRM_IRQSTATUS_MPU_OFFSET);
int i;
events[1] = _read_pending_irq_reg(OMAP4_PRM_IRQENABLE_MPU_2_OFFSET,
OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET);
for (i = 0; i < omap4_prcm_irq_setup.nr_regs; i++)
events[i] = _read_pending_irq_reg(omap4_prcm_irq_setup.mask +
i * 4, omap4_prcm_irq_setup.ack + i * 4);
}
/**
@ -250,17 +252,17 @@ static void omap44xx_prm_ocp_barrier(void)
*/
static void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask)
{
saved_mask[0] =
omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
OMAP4_PRM_IRQENABLE_MPU_OFFSET);
saved_mask[1] =
omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
OMAP4_PRM_IRQENABLE_MPU_2_OFFSET);
int i;
u16 reg;
omap4_prm_write_inst_reg(0, OMAP4430_PRM_OCP_SOCKET_INST,
OMAP4_PRM_IRQENABLE_MPU_OFFSET);
omap4_prm_write_inst_reg(0, OMAP4430_PRM_OCP_SOCKET_INST,
OMAP4_PRM_IRQENABLE_MPU_2_OFFSET);
for (i = 0; i < omap4_prcm_irq_setup.nr_regs; i++) {
reg = omap4_prcm_irq_setup.mask + i * 4;
saved_mask[i] =
omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
reg);
omap4_prm_write_inst_reg(0, OMAP4430_PRM_OCP_SOCKET_INST, reg);
}
/* OCP barrier */
omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
@ -279,10 +281,12 @@ static void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask)
*/
static void omap44xx_prm_restore_irqen(u32 *saved_mask)
{
omap4_prm_write_inst_reg(saved_mask[0], OMAP4430_PRM_OCP_SOCKET_INST,
OMAP4_PRM_IRQENABLE_MPU_OFFSET);
omap4_prm_write_inst_reg(saved_mask[1], OMAP4430_PRM_OCP_SOCKET_INST,
OMAP4_PRM_IRQENABLE_MPU_2_OFFSET);
int i;
for (i = 0; i < omap4_prcm_irq_setup.nr_regs; i++)
omap4_prm_write_inst_reg(saved_mask[i],
OMAP4430_PRM_OCP_SOCKET_INST,
omap4_prcm_irq_setup.mask + i * 4);
}
/**
@ -306,10 +310,10 @@ static void omap44xx_prm_reconfigure_io_chain(void)
omap4_prm_rmw_inst_reg_bits(OMAP4430_WUCLK_CTRL_MASK,
OMAP4430_WUCLK_CTRL_MASK,
inst,
OMAP4_PRM_IO_PMCTRL_OFFSET);
omap4_prcm_irq_setup.pm_ctrl);
omap_test_timeout(
(((omap4_prm_read_inst_reg(inst,
OMAP4_PRM_IO_PMCTRL_OFFSET) &
omap4_prcm_irq_setup.pm_ctrl) &
OMAP4430_WUCLK_STATUS_MASK) >>
OMAP4430_WUCLK_STATUS_SHIFT) == 1),
MAX_IOPAD_LATCH_TIME, i);
@ -319,10 +323,10 @@ static void omap44xx_prm_reconfigure_io_chain(void)
/* Trigger WUCLKIN disable */
omap4_prm_rmw_inst_reg_bits(OMAP4430_WUCLK_CTRL_MASK, 0x0,
inst,
OMAP4_PRM_IO_PMCTRL_OFFSET);
omap4_prcm_irq_setup.pm_ctrl);
omap_test_timeout(
(((omap4_prm_read_inst_reg(inst,
OMAP4_PRM_IO_PMCTRL_OFFSET) &
omap4_prcm_irq_setup.pm_ctrl) &
OMAP4430_WUCLK_STATUS_MASK) >>
OMAP4430_WUCLK_STATUS_SHIFT) == 0),
MAX_IOPAD_LATCH_TIME, i);
@ -350,7 +354,7 @@ static void __init omap44xx_prm_enable_io_wakeup(void)
omap4_prm_rmw_inst_reg_bits(OMAP4430_GLOBAL_WUEN_MASK,
OMAP4430_GLOBAL_WUEN_MASK,
inst,
OMAP4_PRM_IO_PMCTRL_OFFSET);
omap4_prcm_irq_setup.pm_ctrl);
}
/**
@ -719,6 +723,15 @@ int __init omap44xx_prm_init(const struct omap_prcm_init_data *data)
omap4_prminst_set_prm_dev_inst(data->device_inst_offset);
/* Add AM437X specific differences */
if (of_device_is_compatible(data->np, "ti,am4-prcm")) {
omap4_prcm_irq_setup.nr_irqs = 1;
omap4_prcm_irq_setup.nr_regs = 1;
omap4_prcm_irq_setup.pm_ctrl = AM43XX_PRM_IO_PMCTRL_OFFSET;
omap4_prcm_irq_setup.ack = AM43XX_PRM_IRQSTATUS_MPU_OFFSET;
omap4_prcm_irq_setup.mask = AM43XX_PRM_IRQENABLE_MPU_OFFSET;
}
return prm_register(&omap44xx_prm_ll_data);
}

1
arch/arm/mach-omap2/prm_common.c
View File

@ -696,6 +696,7 @@ static struct omap_prcm_init_data am4_prm_data __initdata = {
.index = TI_CLKM_PRM,
.init = omap44xx_prm_init,
.device_inst_offset = AM43XX_PRM_DEVICE_INST,
.flags = PRM_HAS_IO_WAKEUP,
};
#endif

3
arch/arm/mach-omap2/timer.c
View File

@ -208,8 +208,7 @@ static void __init omap_dmtimer_init(void)
/* If we are a secure device, remove any secure timer nodes */
if ((omap_type() != OMAP2_DEVICE_TYPE_GP)) {
np = omap_get_timer_dt(omap_timer_match, "ti,timer-secure");
if (np)
of_node_put(np);
of_node_put(np);
}
}