net: macb: Add support for jumbo frames
Enable jumbo frame support for Zynq Ultrascale+ MPSoC. Update the NWCFG register and descriptor length masks accordingly. Jumbo max length register should be set according to support in SoC; it is set to 10240 for Zynq Ultrascale+ MPSoC. Signed-off-by: Harini Katakam <harinik@xilinx.com> Reviewed-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -782,7 +782,7 @@ static int gem_rx(struct macb *bp, int budget)
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}
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/* now everything is ready for receiving packet */
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bp->rx_skbuff[entry] = NULL;
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len = MACB_BFEXT(RX_FRMLEN, ctrl);
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len = ctrl & bp->rx_frm_len_mask;
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netdev_vdbg(bp->dev, "gem_rx %u (len %u)\n", entry, len);
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@ -828,7 +828,7 @@ static int macb_rx_frame(struct macb *bp, unsigned int first_frag,
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struct macb_dma_desc *desc;
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desc = macb_rx_desc(bp, last_frag);
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len = MACB_BFEXT(RX_FRMLEN, desc->ctrl);
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len = desc->ctrl & bp->rx_frm_len_mask;
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netdev_vdbg(bp->dev, "macb_rx_frame frags %u - %u (len %u)\n",
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macb_rx_ring_wrap(first_frag),
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@ -1633,6 +1633,9 @@ static void macb_init_hw(struct macb *bp)
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config |= MACB_BF(RBOF, NET_IP_ALIGN); /* Make eth data aligned */
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config |= MACB_BIT(PAE); /* PAuse Enable */
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config |= MACB_BIT(DRFCS); /* Discard Rx FCS */
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if (bp->caps | MACB_CAPS_JUMBO)
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config |= MACB_BIT(JFRAME); /* Enable jumbo frames */
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else
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config |= MACB_BIT(BIG); /* Receive oversized frames */
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if (bp->dev->flags & IFF_PROMISC)
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config |= MACB_BIT(CAF); /* Copy All Frames */
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@ -1642,8 +1645,13 @@ static void macb_init_hw(struct macb *bp)
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config |= MACB_BIT(NBC); /* No BroadCast */
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config |= macb_dbw(bp);
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macb_writel(bp, NCFGR, config);
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if ((bp->caps | MACB_CAPS_JUMBO) && bp->jumbo_max_len)
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gem_writel(bp, JML, bp->jumbo_max_len);
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bp->speed = SPEED_10;
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bp->duplex = DUPLEX_HALF;
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bp->rx_frm_len_mask = MACB_RX_FRMLEN_MASK;
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if (bp->caps | MACB_CAPS_JUMBO)
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bp->rx_frm_len_mask = MACB_RX_JFRMLEN_MASK;
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macb_configure_dma(bp);
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@ -2685,10 +2693,12 @@ static const struct macb_config emac_config = {
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};
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static const struct macb_config zynqmp_config = {
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.caps = MACB_CAPS_SG_DISABLED | MACB_CAPS_GIGABIT_MODE_AVAILABLE,
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.caps = MACB_CAPS_SG_DISABLED | MACB_CAPS_GIGABIT_MODE_AVAILABLE |
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MACB_CAPS_JUMBO,
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.dma_burst_length = 16,
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.clk_init = macb_clk_init,
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.init = macb_init,
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.jumbo_max_len = 10240,
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};
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static const struct of_device_id macb_dt_ids[] = {
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@ -2770,6 +2780,10 @@ static int macb_probe(struct platform_device *pdev)
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bp->pclk = pclk;
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bp->hclk = hclk;
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bp->tx_clk = tx_clk;
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if (macb_config->jumbo_max_len) {
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bp->jumbo_max_len = macb_config->jumbo_max_len;
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}
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spin_lock_init(&bp->lock);
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/* setup capabilities */
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@ -71,6 +71,7 @@
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#define GEM_NCFGR 0x0004 /* Network Config */
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#define GEM_USRIO 0x000c /* User IO */
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#define GEM_DMACFG 0x0010 /* DMA Configuration */
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#define GEM_JML 0x0048 /* Jumbo Max Length */
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#define GEM_HRB 0x0080 /* Hash Bottom */
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#define GEM_HRT 0x0084 /* Hash Top */
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#define GEM_SA1B 0x0088 /* Specific1 Bottom */
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@ -397,6 +398,7 @@
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#define MACB_CAPS_GIGABIT_MODE_AVAILABLE 0x20000000
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#define MACB_CAPS_SG_DISABLED 0x40000000
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#define MACB_CAPS_MACB_IS_GEM 0x80000000
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#define MACB_CAPS_JUMBO 0x00000008
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/* Bit manipulation macros */
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#define MACB_BIT(name) \
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@ -514,6 +516,9 @@ struct macb_dma_desc {
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#define MACB_RX_BROADCAST_OFFSET 31
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#define MACB_RX_BROADCAST_SIZE 1
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#define MACB_RX_FRMLEN_MASK 0xFFF
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#define MACB_RX_JFRMLEN_MASK 0x3FFF
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/* RX checksum offload disabled: bit 24 clear in NCFGR */
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#define GEM_RX_TYPEID_MATCH_OFFSET 22
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#define GEM_RX_TYPEID_MATCH_SIZE 2
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@ -757,6 +762,7 @@ struct macb_config {
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int (*clk_init)(struct platform_device *pdev, struct clk **pclk,
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struct clk **hclk, struct clk **tx_clk);
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int (*init)(struct platform_device *pdev);
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int jumbo_max_len;
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};
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struct macb_queue {
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@ -826,6 +832,9 @@ struct macb {
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unsigned int max_tx_length;
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u64 ethtool_stats[GEM_STATS_LEN];
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unsigned int rx_frm_len_mask;
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unsigned int jumbo_max_len;
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};
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static inline bool macb_is_gem(struct macb *bp)
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