MIPS: xilfpga: Add mipsfpga platform code
The xilfpga platform will be DT only. Add required platform code. DT files have already been added separately. Signed-off-by: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> Cc: robh+dt@kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/11364/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -33,6 +33,7 @@ platforms += sibyte
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platforms += sni
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platforms += sni
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platforms += txx9
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platforms += txx9
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platforms += vr41xx
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platforms += vr41xx
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platforms += xilfpga
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# include the platform specific files
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# include the platform specific files
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include $(patsubst %, $(srctree)/arch/mips/%/Platform, $(platforms))
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include $(patsubst %, $(srctree)/arch/mips/%/Platform, $(platforms))
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@ -404,6 +404,28 @@ config MACH_PISTACHIO
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help
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help
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This enables support for the IMG Pistachio SoC platform.
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This enables support for the IMG Pistachio SoC platform.
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config MACH_XILFPGA
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bool "MIPSfpga Xilinx based boards"
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select ARCH_REQUIRE_GPIOLIB
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select BOOT_ELF32
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select BOOT_RAW
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select BUILTIN_DTB
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select CEVT_R4K
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select COMMON_CLK
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select CSRC_R4K
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select IRQ_MIPS_CPU
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select LIBFDT
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select MIPS_CPU_SCACHE
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select SYS_HAS_EARLY_PRINTK
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select SYS_HAS_CPU_MIPS32_R2
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select SYS_SUPPORTS_32BIT_KERNEL
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select SYS_SUPPORTS_LITTLE_ENDIAN
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select SYS_SUPPORTS_ZBOOT_UART16550
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select USE_OF
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select USE_GENERIC_EARLY_PRINTK_8250
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help
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This enables support for the IMG University Program MIPSfpga platform.
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config MIPS_MALTA
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config MIPS_MALTA
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bool "MIPS Malta board"
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bool "MIPS Malta board"
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select ARCH_MAY_HAVE_PC_FDC
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select ARCH_MAY_HAVE_PC_FDC
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@ -970,6 +992,7 @@ source "arch/mips/loongson32/Kconfig"
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source "arch/mips/loongson64/Kconfig"
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source "arch/mips/loongson64/Kconfig"
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source "arch/mips/netlogic/Kconfig"
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source "arch/mips/netlogic/Kconfig"
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source "arch/mips/paravirt/Kconfig"
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source "arch/mips/paravirt/Kconfig"
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source "arch/mips/xilfpga/Kconfig"
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endmenu
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endmenu
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@ -0,0 +1,18 @@
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/*
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* Copyright (C) 2015 Imagination Technologies
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* Author: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#ifndef __MIPS_ASM_MACH_XILFPGA_IRQ_H__
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#define __MIPS_ASM_MACH_XILFPGA_IRQ_H__
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#define NR_IRQS 32
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#include_next <irq.h>
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#endif /* __MIPS_ASM_MACH_XILFPGA_IRQ_H__ */
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@ -0,0 +1,9 @@
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choice
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prompt "Machine type"
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depends on MACH_XILFPGA
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default XILFPGA_NEXYS4DDR
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config XILFPGA_NEXYS4DDR
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bool "Nexys4DDR by Digilent"
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endchoice
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@ -0,0 +1,7 @@
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#
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# Makefile for the Xilfpga
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#
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obj-y += init.o
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obj-y += intc.o
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obj-y += time.o
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@ -0,0 +1,3 @@
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platform-$(CONFIG_MACH_XILFPGA) += xilfpga/
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cflags-$(CONFIG_MACH_XILFPGA) += -I$(srctree)/arch/mips/include/asm/mach-xilfpga
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load-$(CONFIG_MACH_XILFPGA) += 0xffffffff80100000
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@ -0,0 +1,57 @@
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/*
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* Xilfpga platform setup
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*
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* Copyright (C) 2015 Imagination Technologies
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* Author: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*/
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#include <linux/of_fdt.h>
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#include <linux/of_platform.h>
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#include <asm/prom.h>
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#define XILFPGA_UART_BASE 0xb0401000
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const char *get_system_type(void)
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{
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return "MIPSfpga";
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}
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void __init plat_mem_setup(void)
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{
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__dt_setup_arch(__dtb_start);
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strlcpy(arcs_cmdline, boot_command_line, COMMAND_LINE_SIZE);
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}
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void __init prom_init(void)
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{
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setup_8250_early_printk_port(XILFPGA_UART_BASE, 2, 50000);
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}
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void __init prom_free_prom_memory(void)
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{
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}
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void __init device_tree_init(void)
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{
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if (!initial_boot_params)
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return;
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unflatten_and_copy_device_tree();
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}
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static int __init plat_of_setup(void)
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{
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if (!of_have_populated_dt())
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panic("Device tree not present");
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if (of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL))
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panic("Failed to populate DT");
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return 0;
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}
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arch_initcall(plat_of_setup);
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@ -0,0 +1,25 @@
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/*
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* Xilfpga interrupt controller setup
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*
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* Copyright (C) 2015 Imagination Technologies
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* Author: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*/
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#include <linux/of.h>
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#include <linux/of_irq.h>
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#include <asm/irq_cpu.h>
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static struct of_device_id of_irq_ids[] __initdata = {
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{ .compatible = "mti,cpu-interrupt-controller", .data = mips_cpu_irq_of_init },
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{},
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};
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void __init arch_init_irq(void)
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{
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of_irq_init(of_irq_ids);
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}
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@ -0,0 +1,41 @@
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/*
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* Xilfpga clocksource/timer setup
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*
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* Copyright (C) 2015 Imagination Technologies
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* Author: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*/
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#include <linux/clk.h>
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#include <linux/clk-provider.h>
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#include <linux/clocksource.h>
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#include <linux/of.h>
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#include <asm/time.h>
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void __init plat_time_init(void)
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{
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struct device_node *np;
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struct clk *clk;
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of_clk_init(NULL);
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clocksource_of_init();
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np = of_get_cpu_node(0, NULL);
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if (!np) {
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pr_err("Failed to get CPU node\n");
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return;
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}
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clk = of_clk_get(np, 0);
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if (IS_ERR(clk)) {
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pr_err("Failed to get CPU clock: %ld\n", PTR_ERR(clk));
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return;
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}
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mips_hpt_frequency = clk_get_rate(clk) / 2;
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clk_put(clk);
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}
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