dpaa_eth: add support for DPAA Ethernet
This introduces the Freescale Data Path Acceleration Architecture (DPAA) Ethernet driver (dpaa_eth) that builds upon the DPAA QMan, BMan, PAMU and FMan drivers to deliver Ethernet connectivity on the Freescale DPAA QorIQ platforms. Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Madalin Bucur
David S. Miller
parent
ff86aae3b4
commit
9ad1a37493
|
|
@ -93,4 +93,6 @@ config GIANFAR
|
||||||
and MPC86xx family of chips, the eTSEC on LS1021A and the FEC
|
and MPC86xx family of chips, the eTSEC on LS1021A and the FEC
|
||||||
on the 8540.
|
on the 8540.
|
||||||
|
|
||||||
|
source "drivers/net/ethernet/freescale/dpaa/Kconfig"
|
||||||
|
|
||||||
endif # NET_VENDOR_FREESCALE
|
endif # NET_VENDOR_FREESCALE
|
||||||
|
|
|
||||||
|
|
@ -22,3 +22,4 @@ obj-$(CONFIG_UCC_GETH) += ucc_geth_driver.o
|
||||||
ucc_geth_driver-objs := ucc_geth.o ucc_geth_ethtool.o
|
ucc_geth_driver-objs := ucc_geth.o ucc_geth_ethtool.o
|
||||||
|
|
||||||
obj-$(CONFIG_FSL_FMAN) += fman/
|
obj-$(CONFIG_FSL_FMAN) += fman/
|
||||||
|
obj-$(CONFIG_FSL_DPAA_ETH) += dpaa/
|
||||||
|
|
|
||||||
|
|
@ -0,0 +1,10 @@
|
||||||
|
menuconfig FSL_DPAA_ETH
|
||||||
|
tristate "DPAA Ethernet"
|
||||||
|
depends on FSL_SOC && FSL_DPAA && FSL_FMAN
|
||||||
|
select PHYLIB
|
||||||
|
select FSL_FMAN_MAC
|
||||||
|
---help---
|
||||||
|
Data Path Acceleration Architecture Ethernet driver,
|
||||||
|
supporting the Freescale QorIQ chips.
|
||||||
|
Depends on Freescale Buffer Manager and Queue Manager
|
||||||
|
driver and Frame Manager Driver.
|
||||||
|
|
@ -0,0 +1,11 @@
|
||||||
|
#
|
||||||
|
# Makefile for the Freescale DPAA Ethernet controllers
|
||||||
|
#
|
||||||
|
|
||||||
|
# Include FMan headers
|
||||||
|
FMAN = $(srctree)/drivers/net/ethernet/freescale/fman
|
||||||
|
ccflags-y += -I$(FMAN)
|
||||||
|
|
||||||
|
obj-$(CONFIG_FSL_DPAA_ETH) += fsl_dpa.o
|
||||||
|
|
||||||
|
fsl_dpa-objs += dpaa_eth.o
|
||||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,144 @@
|
||||||
|
/* Copyright 2008 - 2016 Freescale Semiconductor Inc.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
* * Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* * Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in the
|
||||||
|
* documentation and/or other materials provided with the distribution.
|
||||||
|
* * Neither the name of Freescale Semiconductor nor the
|
||||||
|
* names of its contributors may be used to endorse or promote products
|
||||||
|
* derived from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||||
|
* GNU General Public License ("GPL") as published by the Free Software
|
||||||
|
* Foundation, either version 2 of that License or (at your option) any
|
||||||
|
* later version.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||||
|
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||||
|
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||||
|
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||||
|
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||||
|
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||||
|
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
|
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||||
|
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef __DPAA_H
|
||||||
|
#define __DPAA_H
|
||||||
|
|
||||||
|
#include <linux/netdevice.h>
|
||||||
|
#include <soc/fsl/qman.h>
|
||||||
|
#include <soc/fsl/bman.h>
|
||||||
|
|
||||||
|
#include "fman.h"
|
||||||
|
#include "mac.h"
|
||||||
|
|
||||||
|
#define DPAA_ETH_TXQ_NUM NR_CPUS
|
||||||
|
|
||||||
|
#define DPAA_BPS_NUM 3 /* number of bpools per interface */
|
||||||
|
|
||||||
|
/* More detailed FQ types - used for fine-grained WQ assignments */
|
||||||
|
enum dpaa_fq_type {
|
||||||
|
FQ_TYPE_RX_DEFAULT = 1, /* Rx Default FQs */
|
||||||
|
FQ_TYPE_RX_ERROR, /* Rx Error FQs */
|
||||||
|
FQ_TYPE_TX, /* "Real" Tx FQs */
|
||||||
|
FQ_TYPE_TX_CONFIRM, /* Tx default Conf FQ (actually an Rx FQ) */
|
||||||
|
FQ_TYPE_TX_CONF_MQ, /* Tx conf FQs (one for each Tx FQ) */
|
||||||
|
FQ_TYPE_TX_ERROR, /* Tx Error FQs (these are actually Rx FQs) */
|
||||||
|
};
|
||||||
|
|
||||||
|
struct dpaa_fq {
|
||||||
|
struct qman_fq fq_base;
|
||||||
|
struct list_head list;
|
||||||
|
struct net_device *net_dev;
|
||||||
|
bool init;
|
||||||
|
u32 fqid;
|
||||||
|
u32 flags;
|
||||||
|
u16 channel;
|
||||||
|
u8 wq;
|
||||||
|
enum dpaa_fq_type fq_type;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct dpaa_fq_cbs {
|
||||||
|
struct qman_fq rx_defq;
|
||||||
|
struct qman_fq tx_defq;
|
||||||
|
struct qman_fq rx_errq;
|
||||||
|
struct qman_fq tx_errq;
|
||||||
|
struct qman_fq egress_ern;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct dpaa_bp {
|
||||||
|
/* device used in the DMA mapping operations */
|
||||||
|
struct device *dev;
|
||||||
|
/* current number of buffers in the buffer pool alloted to each CPU */
|
||||||
|
int __percpu *percpu_count;
|
||||||
|
/* all buffers allocated for this pool have this raw size */
|
||||||
|
size_t raw_size;
|
||||||
|
/* all buffers in this pool have this same usable size */
|
||||||
|
size_t size;
|
||||||
|
/* the buffer pools are initialized with config_count buffers for each
|
||||||
|
* CPU; at runtime the number of buffers per CPU is constantly brought
|
||||||
|
* back to this level
|
||||||
|
*/
|
||||||
|
u16 config_count;
|
||||||
|
u8 bpid;
|
||||||
|
struct bman_pool *pool;
|
||||||
|
/* bpool can be seeded before use by this cb */
|
||||||
|
int (*seed_cb)(struct dpaa_bp *);
|
||||||
|
/* bpool can be emptied before freeing by this cb */
|
||||||
|
void (*free_buf_cb)(const struct dpaa_bp *, struct bm_buffer *);
|
||||||
|
atomic_t refs;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct dpaa_napi_portal {
|
||||||
|
struct napi_struct napi;
|
||||||
|
struct qman_portal *p;
|
||||||
|
bool down;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct dpaa_percpu_priv {
|
||||||
|
struct net_device *net_dev;
|
||||||
|
struct dpaa_napi_portal np;
|
||||||
|
struct rtnl_link_stats64 stats;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct dpaa_buffer_layout {
|
||||||
|
u16 priv_data_size;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct dpaa_priv {
|
||||||
|
struct dpaa_percpu_priv __percpu *percpu_priv;
|
||||||
|
struct dpaa_bp *dpaa_bps[DPAA_BPS_NUM];
|
||||||
|
/* Store here the needed Tx headroom for convenience and speed
|
||||||
|
* (even though it can be computed based on the fields of buf_layout)
|
||||||
|
*/
|
||||||
|
u16 tx_headroom;
|
||||||
|
struct net_device *net_dev;
|
||||||
|
struct mac_device *mac_dev;
|
||||||
|
struct qman_fq *egress_fqs[DPAA_ETH_TXQ_NUM];
|
||||||
|
struct qman_fq *conf_fqs[DPAA_ETH_TXQ_NUM];
|
||||||
|
|
||||||
|
u16 channel;
|
||||||
|
struct list_head dpaa_fq_list;
|
||||||
|
|
||||||
|
u32 msg_enable; /* net_device message level */
|
||||||
|
|
||||||
|
struct {
|
||||||
|
/* All egress queues to a given net device belong to one
|
||||||
|
* (and the same) congestion group.
|
||||||
|
*/
|
||||||
|
struct qman_cgr cgr;
|
||||||
|
} cgr_data;
|
||||||
|
/* Use a per-port CGR for ingress traffic. */
|
||||||
|
bool use_ingress_cgr;
|
||||||
|
struct qman_cgr ingress_cgr;
|
||||||
|
|
||||||
|
struct dpaa_buffer_layout buf_layout[2];
|
||||||
|
u16 rx_headroom;
|
||||||
|
};
|
||||||
|
#endif /* __DPAA_H */
|
||||||
Loading…
Reference in New Issue