PCI: keystone: Add start_link()/stop_link() dw_pcie_ops
Add start_link()/stop_link() dw_pcie_ops and invoke ks_pcie_start_link() directly from host_init. start_link()/stop_link() ops are required for adding EP mode support. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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@ -460,18 +460,33 @@ static int ks_pcie_link_up(struct dw_pcie *pci)
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return (val == PORT_LOGIC_LTSSM_STATE_L0);
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return (val == PORT_LOGIC_LTSSM_STATE_L0);
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}
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}
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static void ks_pcie_initiate_link_train(struct keystone_pcie *ks_pcie)
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static void ks_pcie_stop_link(struct dw_pcie *pci)
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{
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{
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struct keystone_pcie *ks_pcie = to_keystone_pcie(pci);
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u32 val;
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u32 val;
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/* Disable Link training */
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/* Disable Link training */
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val = ks_pcie_app_readl(ks_pcie, CMD_STATUS);
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val = ks_pcie_app_readl(ks_pcie, CMD_STATUS);
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val &= ~LTSSM_EN_VAL;
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val &= ~LTSSM_EN_VAL;
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ks_pcie_app_writel(ks_pcie, CMD_STATUS, LTSSM_EN_VAL | val);
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ks_pcie_app_writel(ks_pcie, CMD_STATUS, LTSSM_EN_VAL | val);
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}
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static int ks_pcie_start_link(struct dw_pcie *pci)
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{
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struct keystone_pcie *ks_pcie = to_keystone_pcie(pci);
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struct device *dev = pci->dev;
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u32 val;
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if (dw_pcie_link_up(pci)) {
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dev_dbg(dev, "link is already up\n");
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return 0;
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}
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/* Initiate Link Training */
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/* Initiate Link Training */
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val = ks_pcie_app_readl(ks_pcie, CMD_STATUS);
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val = ks_pcie_app_readl(ks_pcie, CMD_STATUS);
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ks_pcie_app_writel(ks_pcie, CMD_STATUS, LTSSM_EN_VAL | val);
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ks_pcie_app_writel(ks_pcie, CMD_STATUS, LTSSM_EN_VAL | val);
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return 0;
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}
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}
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/**
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/**
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@ -556,26 +571,6 @@ static void ks_pcie_quirk(struct pci_dev *dev)
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}
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}
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DECLARE_PCI_FIXUP_ENABLE(PCI_ANY_ID, PCI_ANY_ID, ks_pcie_quirk);
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DECLARE_PCI_FIXUP_ENABLE(PCI_ANY_ID, PCI_ANY_ID, ks_pcie_quirk);
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static int ks_pcie_establish_link(struct keystone_pcie *ks_pcie)
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{
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struct dw_pcie *pci = ks_pcie->pci;
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struct device *dev = pci->dev;
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if (dw_pcie_link_up(pci)) {
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dev_info(dev, "Link already up\n");
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return 0;
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}
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ks_pcie_initiate_link_train(ks_pcie);
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/* check if the link is up or not */
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if (!dw_pcie_wait_for_link(pci))
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return 0;
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dev_err(dev, "phy link never came up\n");
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return -ETIMEDOUT;
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}
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static void ks_pcie_msi_irq_handler(struct irq_desc *desc)
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static void ks_pcie_msi_irq_handler(struct irq_desc *desc)
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{
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{
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unsigned int irq = desc->irq_data.hwirq;
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unsigned int irq = desc->irq_data.hwirq;
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@ -813,7 +808,7 @@ static int __init ks_pcie_host_init(struct pcie_port *pp)
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dw_pcie_setup_rc(pp);
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dw_pcie_setup_rc(pp);
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ks_pcie_establish_link(ks_pcie);
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ks_pcie_stop_link(pci);
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ks_pcie_setup_rc_app_regs(ks_pcie);
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ks_pcie_setup_rc_app_regs(ks_pcie);
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ks_pcie_setup_interrupts(ks_pcie);
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ks_pcie_setup_interrupts(ks_pcie);
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writew(PCI_IO_RANGE_TYPE_32 | (PCI_IO_RANGE_TYPE_32 << 8),
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writew(PCI_IO_RANGE_TYPE_32 | (PCI_IO_RANGE_TYPE_32 << 8),
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@ -830,6 +825,9 @@ static int __init ks_pcie_host_init(struct pcie_port *pp)
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hook_fault_code(17, ks_pcie_fault, SIGBUS, 0,
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hook_fault_code(17, ks_pcie_fault, SIGBUS, 0,
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"Asynchronous external abort");
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"Asynchronous external abort");
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ks_pcie_start_link(pci);
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dw_pcie_wait_for_link(pci);
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return 0;
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return 0;
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}
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}
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@ -892,6 +890,8 @@ static const struct of_device_id ks_pcie_of_match[] = {
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};
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};
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static const struct dw_pcie_ops ks_pcie_dw_pcie_ops = {
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static const struct dw_pcie_ops ks_pcie_dw_pcie_ops = {
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.start_link = ks_pcie_start_link,
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.stop_link = ks_pcie_stop_link,
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.link_up = ks_pcie_link_up,
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.link_up = ks_pcie_link_up,
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};
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};
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