Merge branch 'drm-next-4.15' of git://people.freedesktop.org/~agd5f/linux into drm-next
more misc amdgpu fixes. * 'drm-next-4.15' of git://people.freedesktop.org/~agd5f/linux: drm/amdgpu: fix rmmod KCQ disable failed error drm/amdgpu: fix kernel hang when starting VNC server drm/amdgpu: don't skip attributes when powerplay is enabled drm/amd/pp: fix typecast error in powerplay. Revert "drm/radeon: dont switch vt on suspend" drm/amd/amdgpu: fix over-bound accessing in amdgpu_cs_wait_any_fence drm/amd/powerplay: fix unfreeze level smc message for smu7 drm/amdgpu:fix memleak drm/amdgpu:fix memleak in takedown
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commit
9cae7751dc
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@ -1498,7 +1498,7 @@ static int amdgpu_cs_wait_any_fence(struct amdgpu_device *adev,
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wait->out.status = (r > 0);
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wait->out.first_signaled = first;
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if (array[first])
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if (first < fence_count && array[first])
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r = array[first]->error;
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else
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r = 0;
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@ -1836,6 +1836,9 @@ static int amdgpu_fini(struct amdgpu_device *adev)
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adev->ip_blocks[i].status.hw = false;
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}
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if (adev->firmware.load_type == AMDGPU_FW_LOAD_SMU)
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amdgpu_ucode_fini_bo(adev);
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for (i = adev->num_ip_blocks - 1; i >= 0; i--) {
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if (!adev->ip_blocks[i].status.sw)
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continue;
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@ -328,7 +328,7 @@ int amdgpu_gem_userptr_ioctl(struct drm_device *dev, void *data,
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r = amdgpu_ttm_tt_get_user_pages(bo->tbo.ttm,
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bo->tbo.ttm->pages);
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if (r)
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goto unlock_mmap_sem;
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goto release_object;
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r = amdgpu_bo_reserve(bo, true);
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if (r)
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@ -353,9 +353,6 @@ int amdgpu_gem_userptr_ioctl(struct drm_device *dev, void *data,
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free_pages:
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release_pages(bo->tbo.ttm->pages, bo->tbo.ttm->num_pages, false);
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unlock_mmap_sem:
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up_read(¤t->mm->mmap_sem);
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release_object:
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drm_gem_object_put_unlocked(gobj);
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@ -71,12 +71,6 @@ static int amdgpu_gtt_mgr_fini(struct ttm_mem_type_manager *man)
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{
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struct amdgpu_gtt_mgr *mgr = man->priv;
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spin_lock(&mgr->lock);
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if (!drm_mm_clean(&mgr->mm)) {
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spin_unlock(&mgr->lock);
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return -EBUSY;
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}
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drm_mm_takedown(&mgr->mm);
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spin_unlock(&mgr->lock);
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kfree(mgr);
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@ -946,6 +946,10 @@ static umode_t hwmon_attributes_visible(struct kobject *kobj,
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struct amdgpu_device *adev = dev_get_drvdata(dev);
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umode_t effective_mode = attr->mode;
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/* no skipping for powerplay */
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if (adev->powerplay.cgs_device)
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return effective_mode;
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/* Skip limit attributes if DPM is not enabled */
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if (!adev->pm.dpm_enabled &&
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(attr == &sensor_dev_attr_temp1_crit.dev_attr.attr ||
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@ -164,9 +164,6 @@ static int amdgpu_pp_hw_fini(void *handle)
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ret = adev->powerplay.ip_funcs->hw_fini(
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adev->powerplay.pp_handle);
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if (adev->firmware.load_type == AMDGPU_FW_LOAD_SMU)
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amdgpu_ucode_fini_bo(adev);
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return ret;
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}
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@ -442,8 +442,6 @@ static int psp_hw_fini(void *handle)
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if (adev->firmware.load_type != AMDGPU_FW_LOAD_PSP)
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return 0;
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amdgpu_ucode_fini_bo(adev);
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psp_ring_destroy(psp, PSP_RING_TYPE__KM);
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amdgpu_bo_free_kernel(&psp->tmr_bo, &psp->tmr_mc_addr, &psp->tmr_buf);
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@ -68,11 +68,6 @@ static int amdgpu_vram_mgr_fini(struct ttm_mem_type_manager *man)
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struct amdgpu_vram_mgr *mgr = man->priv;
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spin_lock(&mgr->lock);
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if (!drm_mm_clean(&mgr->mm)) {
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spin_unlock(&mgr->lock);
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return -EBUSY;
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}
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drm_mm_takedown(&mgr->mm);
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spin_unlock(&mgr->lock);
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kfree(mgr);
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@ -4670,6 +4670,14 @@ static int gfx_v7_0_sw_fini(void *handle)
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gfx_v7_0_cp_compute_fini(adev);
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gfx_v7_0_rlc_fini(adev);
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gfx_v7_0_mec_fini(adev);
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amdgpu_bo_free_kernel(&adev->gfx.rlc.clear_state_obj,
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&adev->gfx.rlc.clear_state_gpu_addr,
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(void **)&adev->gfx.rlc.cs_ptr);
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if (adev->gfx.rlc.cp_table_size) {
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amdgpu_bo_free_kernel(&adev->gfx.rlc.cp_table_obj,
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&adev->gfx.rlc.cp_table_gpu_addr,
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(void **)&adev->gfx.rlc.cp_table_ptr);
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}
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gfx_v7_0_free_microcode(adev);
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return 0;
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@ -2118,6 +2118,15 @@ static int gfx_v8_0_sw_fini(void *handle)
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gfx_v8_0_mec_fini(adev);
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gfx_v8_0_rlc_fini(adev);
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amdgpu_bo_free_kernel(&adev->gfx.rlc.clear_state_obj,
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&adev->gfx.rlc.clear_state_gpu_addr,
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(void **)&adev->gfx.rlc.cs_ptr);
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if ((adev->asic_type == CHIP_CARRIZO) ||
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(adev->asic_type == CHIP_STONEY)) {
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amdgpu_bo_free_kernel(&adev->gfx.rlc.cp_table_obj,
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&adev->gfx.rlc.cp_table_gpu_addr,
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(void **)&adev->gfx.rlc.cp_table_ptr);
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}
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gfx_v8_0_free_microcode(adev);
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return 0;
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@ -1468,6 +1468,14 @@ static int gfx_v9_0_sw_fini(void *handle)
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gfx_v9_0_mec_fini(adev);
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gfx_v9_0_ngg_fini(adev);
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amdgpu_bo_free_kernel(&adev->gfx.rlc.clear_state_obj,
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&adev->gfx.rlc.clear_state_gpu_addr,
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(void **)&adev->gfx.rlc.cs_ptr);
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if (adev->asic_type == CHIP_RAVEN) {
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amdgpu_bo_free_kernel(&adev->gfx.rlc.cp_table_obj,
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&adev->gfx.rlc.cp_table_gpu_addr,
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(void **)&adev->gfx.rlc.cp_table_ptr);
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}
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gfx_v9_0_free_microcode(adev);
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return 0;
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@ -830,9 +830,9 @@ static int init_over_drive_limits(
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const ATOM_Tonga_POWERPLAYTABLE *powerplay_table)
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{
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hwmgr->platform_descriptor.overdriveLimit.engineClock =
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le16_to_cpu(powerplay_table->ulMaxODEngineClock);
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le32_to_cpu(powerplay_table->ulMaxODEngineClock);
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hwmgr->platform_descriptor.overdriveLimit.memoryClock =
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le16_to_cpu(powerplay_table->ulMaxODMemoryClock);
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le32_to_cpu(powerplay_table->ulMaxODMemoryClock);
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hwmgr->platform_descriptor.minOverdriveVDDC = 0;
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hwmgr->platform_descriptor.maxOverdriveVDDC = 0;
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@ -3778,7 +3778,7 @@ static int smu7_unfreeze_sclk_mclk_dpm(struct pp_hwmgr *hwmgr)
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"Trying to Unfreeze MCLK DPM when DPM is disabled",
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);
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PP_ASSERT_WITH_CODE(0 == smum_send_msg_to_smc(hwmgr,
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PPSMC_MSG_SCLKDPM_UnfreezeLevel),
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PPSMC_MSG_MCLKDPM_UnfreezeLevel),
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"Failed to unfreeze MCLK DPM during UnFreezeSclkMclkDPM Function!",
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return -EINVAL);
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}
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@ -245,7 +245,6 @@ static int radeonfb_create(struct drm_fb_helper *helper,
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}
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info->par = rfbdev;
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info->skip_vt_switch = true;
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ret = radeon_framebuffer_init(rdev->ddev, &rfbdev->rfb, &mode_cmd, gobj);
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if (ret) {
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