arm64: dts: ls1012a: Add coreclk
ls1012a has separate input root clocks for core PLLs versus the platform PLL, with the latter described as sysclk in the hw docs. Accordingly, update the clock-frequency in sysclk to 125M as platform input clock. Signed-off-by: Scott Wood <oss@buserror.net> Signed-off-by: Tang Yuantian <andy.tang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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@ -76,10 +76,17 @@ cpu0: cpu@0 {
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sysclk: sysclk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <100000000>;
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clock-frequency = <125000000>;
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clock-output-names = "sysclk";
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};
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coreclk: coreclk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <100000000>;
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clock-output-names = "coreclk";
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};
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timer {
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compatible = "arm,armv8-timer";
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interrupts = <1 13 IRQ_TYPE_LEVEL_LOW>,/* Physical Secure PPI */
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@ -248,7 +255,8 @@ clockgen: clocking@1ee1000 {
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compatible = "fsl,ls1012a-clockgen";
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reg = <0x0 0x1ee1000 0x0 0x1000>;
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#clock-cells = <2>;
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clocks = <&sysclk>;
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clocks = <&sysclk &coreclk>;
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clock-names = "sysclk", "coreclk";
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};
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tmu: tmu@1f00000 {
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