serial: 8250: 8250_omap: Fix race b/w dma completion and RX timeout
DMA RX completion handler for UART is called from a tasklet and hence may be delayed depending on the system load. In meanwhile, there may be RX timeout interrupt which can get serviced first before DMA RX completion handler is executed for the completed transfer. omap_8250_rx_dma_flush() which is called on RX timeout interrupt makes sure that the DMA RX buffer is pushed and then the FIFO is drained and also queues a new DMA request. But, when DMA RX completion handler executes, it will erroneously flush the currently queued DMA transfer which sometimes results in data corruption and double queueing of DMA RX requests. Fix this by checking whether RX completion is for the currently queued transfer or not. And also hold port lock when in DMA completion to avoid race wrt RX timeout handler preempting it. Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -786,8 +786,27 @@ static void __dma_rx_do_complete(struct uart_8250_port *p)
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static void __dma_rx_complete(void *param)
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{
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__dma_rx_do_complete(param);
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omap_8250_rx_dma(param);
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struct uart_8250_port *p = param;
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struct uart_8250_dma *dma = p->dma;
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struct dma_tx_state state;
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unsigned long flags;
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spin_lock_irqsave(&p->port.lock, flags);
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/*
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* If the tx status is not DMA_COMPLETE, then this is a delayed
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* completion callback. A previous RX timeout flush would have
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* already pushed the data, so exit.
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*/
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if (dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state) !=
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DMA_COMPLETE) {
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spin_unlock_irqrestore(&p->port.lock, flags);
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return;
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}
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__dma_rx_do_complete(p);
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omap_8250_rx_dma(p);
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spin_unlock_irqrestore(&p->port.lock, flags);
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}
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static void omap_8250_rx_dma_flush(struct uart_8250_port *p)
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