ntb_hw_switchtec: Added support of >=4G memory windows
Current Switchtec's BAR setup registers are limited to 32bits, corresponding to the maximum MW (memory window) size is <4G. Increase the MW sizes with the addition of the BAR Setup Extension Register for the upper 32bits of a 64bits MW size. This increases the MW range to between 4K and 2^63. Reported-by: Boris Glimcher <boris.glimcher@emc.com> Signed-off-by: Paul Selles <paul.selles@microchip.com> Signed-off-by: Wesley Sheng <wesley.sheng@microchip.com> Reviewed-by: Logan Gunthorpe <logang@deltatee.com> Signed-off-by: Jon Mason <jdmason@kudzu.us>
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@ -264,6 +264,7 @@ static void switchtec_ntb_mw_clr_direct(struct switchtec_ntb *sndev, int idx)
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ctl_val &= ~NTB_CTRL_BAR_DIR_WIN_EN;
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iowrite32(ctl_val, &ctl->bar_entry[bar].ctl);
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iowrite32(0, &ctl->bar_entry[bar].win_size);
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iowrite32(0, &ctl->bar_ext_entry[bar].win_size);
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iowrite64(sndev->self_partition, &ctl->bar_entry[bar].xlate_addr);
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}
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@ -286,7 +287,9 @@ static void switchtec_ntb_mw_set_direct(struct switchtec_ntb *sndev, int idx,
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ctl_val |= NTB_CTRL_BAR_DIR_WIN_EN;
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iowrite32(ctl_val, &ctl->bar_entry[bar].ctl);
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iowrite32(xlate_pos | size, &ctl->bar_entry[bar].win_size);
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iowrite32(xlate_pos | (lower_32_bits(size) & 0xFFFFF000),
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&ctl->bar_entry[bar].win_size);
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iowrite32(upper_32_bits(size), &ctl->bar_ext_entry[bar].win_size);
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iowrite64(sndev->self_partition | addr,
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&ctl->bar_entry[bar].xlate_addr);
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}
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@ -1053,7 +1056,9 @@ static int crosslink_setup_mws(struct switchtec_ntb *sndev, int ntb_lut_idx,
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ctl_val |= NTB_CTRL_BAR_DIR_WIN_EN;
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iowrite32(ctl_val, &ctl->bar_entry[bar].ctl);
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iowrite32(xlate_pos | size, &ctl->bar_entry[bar].win_size);
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iowrite32(xlate_pos | (lower_32_bits(size) & 0xFFFFF000),
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&ctl->bar_entry[bar].win_size);
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iowrite32(upper_32_bits(size), &ctl->bar_ext_entry[bar].win_size);
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iowrite64(sndev->peer_partition | addr,
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&ctl->bar_entry[bar].xlate_addr);
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}
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@ -248,7 +248,11 @@ struct ntb_ctrl_regs {
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u32 win_size;
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u64 xlate_addr;
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} bar_entry[6];
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u32 reserved2[216];
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struct {
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u32 win_size;
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u32 reserved[3];
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} bar_ext_entry[6];
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u32 reserved2[192];
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u32 req_id_table[512];
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u32 reserved3[256];
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u64 lut_entry[512];
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