gpio: hlwd: Pass irqchip when adding gpiochip
We need to convert all old gpio irqchips to pass the irqchip setup along when adding the gpio_chip. For more info see drivers/gpio/TODO. For chained irqchips this is a pretty straight-forward conversion. Cc: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20190809140005.11654-1-linus.walleij@linaro.org Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Tested-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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@ -244,43 +244,45 @@ static int hlwd_gpio_probe(struct platform_device *pdev)
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ngpios = 32;
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ngpios = 32;
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hlwd->gpioc.ngpio = ngpios;
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hlwd->gpioc.ngpio = ngpios;
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res = devm_gpiochip_add_data(&pdev->dev, &hlwd->gpioc, hlwd);
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if (res)
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return res;
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/* Mask and ack all interrupts */
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/* Mask and ack all interrupts */
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iowrite32be(0, hlwd->regs + HW_GPIOB_INTMASK);
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iowrite32be(0, hlwd->regs + HW_GPIOB_INTMASK);
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iowrite32be(0xffffffff, hlwd->regs + HW_GPIOB_INTFLAG);
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iowrite32be(0xffffffff, hlwd->regs + HW_GPIOB_INTFLAG);
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/*
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/*
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* If this GPIO controller is not marked as an interrupt controller in
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* If this GPIO controller is not marked as an interrupt controller in
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* the DT, return.
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* the DT, skip interrupt support.
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*/
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*/
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if (!of_property_read_bool(pdev->dev.of_node, "interrupt-controller"))
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if (of_property_read_bool(pdev->dev.of_node, "interrupt-controller")) {
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return 0;
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struct gpio_irq_chip *girq;
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hlwd->irq = platform_get_irq(pdev, 0);
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hlwd->irq = platform_get_irq(pdev, 0);
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if (hlwd->irq < 0) {
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if (hlwd->irq < 0) {
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dev_info(&pdev->dev, "platform_get_irq returned %d\n",
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dev_info(&pdev->dev, "platform_get_irq returned %d\n",
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hlwd->irq);
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hlwd->irq);
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return hlwd->irq;
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return hlwd->irq;
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}
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hlwd->irqc.name = dev_name(&pdev->dev);
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hlwd->irqc.irq_mask = hlwd_gpio_irq_mask;
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hlwd->irqc.irq_unmask = hlwd_gpio_irq_unmask;
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hlwd->irqc.irq_enable = hlwd_gpio_irq_enable;
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hlwd->irqc.irq_set_type = hlwd_gpio_irq_set_type;
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girq = &hlwd->gpioc.irq;
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girq->chip = &hlwd->irqc;
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girq->parent_handler = hlwd_gpio_irqhandler;
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girq->num_parents = 1;
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girq->parents = devm_kcalloc(&pdev->dev, 1,
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sizeof(*girq->parents),
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GFP_KERNEL);
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if (!girq->parents)
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return -ENOMEM;
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girq->parents[0] = hlwd->irq;
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girq->default_type = IRQ_TYPE_NONE;
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girq->handler = handle_level_irq;
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}
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}
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hlwd->irqc.name = dev_name(&pdev->dev);
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return devm_gpiochip_add_data(&pdev->dev, &hlwd->gpioc, hlwd);
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hlwd->irqc.irq_mask = hlwd_gpio_irq_mask;
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hlwd->irqc.irq_unmask = hlwd_gpio_irq_unmask;
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hlwd->irqc.irq_enable = hlwd_gpio_irq_enable;
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hlwd->irqc.irq_set_type = hlwd_gpio_irq_set_type;
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res = gpiochip_irqchip_add(&hlwd->gpioc, &hlwd->irqc, 0,
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handle_level_irq, IRQ_TYPE_NONE);
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if (res)
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return res;
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gpiochip_set_chained_irqchip(&hlwd->gpioc, &hlwd->irqc,
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hlwd->irq, hlwd_gpio_irqhandler);
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return 0;
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}
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}
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static const struct of_device_id hlwd_gpio_match[] = {
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static const struct of_device_id hlwd_gpio_match[] = {
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