clk: rockchip: fix up indentation of some RV1108 clock-ids
Make the code look better. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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@ -173,16 +173,16 @@
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#define CLK_NR_CLKS (HCLK_VPU + 1)
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/* reset id */
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#define SRST_CORE_PO_AD 0
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#define SRST_CORE_PO_AD 0
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#define SRST_CORE_AD 1
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#define SRST_L2_AD 2
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#define SRST_CPU_NIU_AD 3
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#define SRST_CPU_NIU_AD 3
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#define SRST_CORE_PO 4
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#define SRST_CORE 5
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#define SRST_L2 6
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#define SRST_L2 6
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#define SRST_CORE_DBG 8
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#define PRST_DBG 9
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#define RST_DAP 10
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#define RST_DAP 10
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#define PRST_DBG_NIU 11
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#define ARST_STRC_SYS_AD 15
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@ -249,9 +249,9 @@
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#define HRST_SYSBUS 75
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#define PRST_USBGRF 76
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#define ARST_PERIPH_NIU 80
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#define HRST_PERIPH_NIU 81
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#define PRST_PERIPH_NIU 82
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#define ARST_PERIPH_NIU 80
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#define HRST_PERIPH_NIU 81
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#define PRST_PERIPH_NIU 82
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#define HRST_PERIPH 83
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#define HRST_SDMMC 84
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#define HRST_SDIO 85
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@ -269,7 +269,7 @@
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#define HRST_HOST0_AUX 96
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#define HRST_HOST0_ARB 97
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#define SRST_HOST0_EHCIPHY 98
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#define SRST_HOST0_UTMI 99
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#define SRST_HOST0_UTMI 99
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#define SRST_USBPOR 100
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#define SRST_UTMI0 101
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#define SRST_UTMI1 102
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@ -316,21 +316,21 @@
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#define HRST_VPU_NIU 141
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#define ARST_VPU 142
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#define HRST_VPU 143
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#define ARST_RKVDEC_NIU 144
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#define HRST_RKVDEC_NIU 145
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#define ARST_RKVDEC_NIU 144
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#define HRST_RKVDEC_NIU 145
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#define ARST_RKVDEC 146
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#define HRST_RKVDEC 147
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#define SRST_RKVDEC_CABAC 148
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#define SRST_RKVDEC_CORE 149
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#define ARST_RKVENC_NIU 150
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#define HRST_RKVENC_NIU 151
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#define ARST_RKVENC_NIU 150
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#define HRST_RKVENC_NIU 151
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#define ARST_RKVENC 152
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#define HRST_RKVENC 153
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#define SRST_RKVENC_CORE 154
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#define SRST_DSP_CORE 156
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#define SRST_DSP_SYS 157
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#define SRST_DSP_GLOBAL 158
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#define SRST_DSP_GLOBAL 158
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#define SRST_DSP_OECM 159
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#define PRST_DSP_IOP_NIU 160
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#define ARST_DSP_EPP_NIU 161
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@ -348,7 +348,7 @@
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#define SRST_PMU_I2C0 173
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#define PRST_PMU_I2C0 174
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#define PRST_PMU_GPIO0 175
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#define PRST_PMU_INTMEM 176
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#define PRST_PMU_INTMEM 176
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#define PRST_PMU_PWM0 177
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#define SRST_PMU_PWM0 178
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#define PRST_PMU_GRF 179
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