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drm/amdgpu: add release firmware for cgs 

Powerplay uses cgs to load the firmware so add a function
to release it as well to avoid leaking it on driver unload.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Monk Liu 2016-05-31 13:44:30 +08:00 committed by Alex Deucher
parent 86e4cdd675
commit a392746a8c
2 changed files with 18 additions and 0 deletions
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12
drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
View File

@ -696,6 +696,17 @@ static uint32_t fw_type_convert(struct cgs_device *cgs_device, uint32_t fw_type)
return result; return result;
} }
static int amdgpu_cgs_rel_firmware(struct cgs_device *cgs_device, enum cgs_ucode_id type)
{
CGS_FUNC_ADEV;
if ((CGS_UCODE_ID_SMU == type) || (CGS_UCODE_ID_SMU_SK == type)) {
release_firmware(adev->pm.fw);
return 0;
}
/* cannot release other firmware because they are not created by cgs */
return -EINVAL;
}
static int amdgpu_cgs_get_firmware_info(struct cgs_device *cgs_device, static int amdgpu_cgs_get_firmware_info(struct cgs_device *cgs_device,
enum cgs_ucode_id type, enum cgs_ucode_id type,
struct cgs_firmware_info *info) struct cgs_firmware_info *info)
@ -1125,6 +1136,7 @@ static const struct cgs_ops amdgpu_cgs_ops = {
amdgpu_cgs_pm_query_clock_limits, amdgpu_cgs_pm_query_clock_limits,
amdgpu_cgs_set_camera_voltages, amdgpu_cgs_set_camera_voltages,
amdgpu_cgs_get_firmware_info, amdgpu_cgs_get_firmware_info,
amdgpu_cgs_rel_firmware,
amdgpu_cgs_set_powergating_state, amdgpu_cgs_set_powergating_state,
amdgpu_cgs_set_clockgating_state, amdgpu_cgs_set_clockgating_state,
amdgpu_cgs_get_active_displays_info, amdgpu_cgs_get_active_displays_info,

6
drivers/gpu/drm/amd/include/cgs_common.h
View File

@ -581,6 +581,9 @@ typedef int (*cgs_get_firmware_info)(struct cgs_device *cgs_device,
enum cgs_ucode_id type, enum cgs_ucode_id type,
struct cgs_firmware_info *info); struct cgs_firmware_info *info);
typedef int (*cgs_rel_firmware)(struct cgs_device *cgs_device,
enum cgs_ucode_id type);
typedef int(*cgs_set_powergating_state)(struct cgs_device *cgs_device, typedef int(*cgs_set_powergating_state)(struct cgs_device *cgs_device,
enum amd_ip_block_type block_type, enum amd_ip_block_type block_type,
enum amd_powergating_state state); enum amd_powergating_state state);
@ -645,6 +648,7 @@ struct cgs_ops {
cgs_set_camera_voltages_t set_camera_voltages; cgs_set_camera_voltages_t set_camera_voltages;
/* Firmware Info */ /* Firmware Info */
cgs_get_firmware_info get_firmware_info; cgs_get_firmware_info get_firmware_info;
cgs_rel_firmware rel_firmware;
/* cg pg interface*/ /* cg pg interface*/
cgs_set_powergating_state set_powergating_state; cgs_set_powergating_state set_powergating_state;
cgs_set_clockgating_state set_clockgating_state; cgs_set_clockgating_state set_clockgating_state;
@ -738,6 +742,8 @@ struct cgs_device
CGS_CALL(set_camera_voltages,dev,mask,voltages) CGS_CALL(set_camera_voltages,dev,mask,voltages)
#define cgs_get_firmware_info(dev, type, info) \ #define cgs_get_firmware_info(dev, type, info) \
CGS_CALL(get_firmware_info, dev, type, info) CGS_CALL(get_firmware_info, dev, type, info)
#define cgs_rel_firmware(dev, type) \
CGS_CALL(rel_firmware, dev, type)
#define cgs_set_powergating_state(dev, block_type, state) \ #define cgs_set_powergating_state(dev, block_type, state) \
CGS_CALL(set_powergating_state, dev, block_type, state) CGS_CALL(set_powergating_state, dev, block_type, state)
#define cgs_set_clockgating_state(dev, block_type, state) \ #define cgs_set_clockgating_state(dev, block_type, state) \