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clk: renesas: r7s9210: Add SPI clocks 

Add RSPI clocks for RZ/A2.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Chris Brandt 2018-09-26 08:39:56 -05:00 committed by Geert Uytterhoeven
parent 4cb1480f5f
commit a53a28dca4
1 changed files with 3 additions and 0 deletions
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drivers/clk/renesas/r7s9210-cpg-mssr.c
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@ -95,6 +95,9 @@ static const struct mssr_mod_clk r7s9210_mod_clks[] __initconst = {
DEF_MOD_STB("i2c1", 86, R7S9210_CLK_P1),
DEF_MOD_STB("i2c0", 87, R7S9210_CLK_P1),
DEF_MOD_STB("spi2", 95, R7S9210_CLK_P1),
DEF_MOD_STB("spi1", 96, R7S9210_CLK_P1),
DEF_MOD_STB("spi0", 97, R7S9210_CLK_P1),
};
/* The clock dividers in the table vary based on DT and register settings */