pinctrl: imx: remove gpio_request_enable and gpio_disable_free
gpio_request_enable/disable_free actually are not quite necessary as standard IMX pinctrl binding already sets GPIO mux from device tree, e.g. VF610_PAD_PTB20__GPIO_42 or MX7D_PAD_SD2_CD_B__GPIO5_IO9 No need to do it again in gpio_request_enable. And according to Stefan: "For all GPIO I checked in upstream device trees we assign a pinctrl to the same node, so in all cases gpio_request_enable/disable is really unnecessary." So it should be safe to simply remove it. Note that this changes semantics for Vybrid, e.g. "The two functions have been introduced for Vybrid (through SHARE_MUX_CONF_REG) and mux pins as GPIOs automatically when a GPIO gets requested. The automatic mux is optional by the pinmux/gpio subsystem semantics, and other NXP devices do not use it, instead an explicit pinctrl node is added in the device tree to mux GPIOs where required. Hence this change aligns Vybrid to other NXP (i.MX) devices. Note that all upstream device tree assign proper pinctrl properties where GPIOs are used so no change is necessary for device trees." Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Fugang Duan <fugang.duan@nxp.com> Cc: Bai Ping <ping.bai@nxp.com> Acked-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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b026402b73
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@ -255,73 +255,6 @@ static int imx_pmx_set(struct pinctrl_dev *pctldev, unsigned selector,
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return 0;
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}
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static int imx_pmx_gpio_request_enable(struct pinctrl_dev *pctldev,
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struct pinctrl_gpio_range *range, unsigned offset)
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{
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struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
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struct imx_pinctrl_soc_info *info = ipctl->info;
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const struct imx_pin_reg *pin_reg;
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struct group_desc *grp;
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struct imx_pin *imx_pin;
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unsigned int pin, group;
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u32 reg;
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/* Currently implementation only for shared mux/conf register */
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if (!(info->flags & SHARE_MUX_CONF_REG))
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return 0;
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pin_reg = &info->pin_regs[offset];
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if (pin_reg->mux_reg == -1)
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return -EINVAL;
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/* Find the pinctrl config with GPIO mux mode for the requested pin */
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for (group = 0; group < pctldev->num_groups; group++) {
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grp = pinctrl_generic_get_group(pctldev, group);
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if (!grp)
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continue;
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for (pin = 0; pin < grp->num_pins; pin++) {
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imx_pin = &((struct imx_pin *)(grp->data))[pin];
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if (imx_pin->pin == offset && !imx_pin->mux_mode)
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goto mux_pin;
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}
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}
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return -EINVAL;
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mux_pin:
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reg = readl(ipctl->base + pin_reg->mux_reg);
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reg &= ~info->mux_mask;
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reg |= imx_pin->config;
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writel(reg, ipctl->base + pin_reg->mux_reg);
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return 0;
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}
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static void imx_pmx_gpio_disable_free(struct pinctrl_dev *pctldev,
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struct pinctrl_gpio_range *range, unsigned offset)
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{
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struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
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struct imx_pinctrl_soc_info *info = ipctl->info;
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const struct imx_pin_reg *pin_reg;
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u32 reg;
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/*
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* Only Vybrid has the input/output buffer enable flags (IBE/OBE)
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* They are part of the shared mux/conf register.
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*/
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if (!(info->flags & SHARE_MUX_CONF_REG))
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return;
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pin_reg = &info->pin_regs[offset];
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if (pin_reg->mux_reg == -1)
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return;
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/* Clear IBE/OBE/PUE to disable the pin (Hi-Z) */
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reg = readl(ipctl->base + pin_reg->mux_reg);
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reg &= ~0x7;
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writel(reg, ipctl->base + pin_reg->mux_reg);
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}
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static int imx_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,
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struct pinctrl_gpio_range *range, unsigned offset, bool input)
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{
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@ -357,8 +290,6 @@ static const struct pinmux_ops imx_pmx_ops = {
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.get_function_name = pinmux_generic_get_function_name,
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.get_function_groups = pinmux_generic_get_function_groups,
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.set_mux = imx_pmx_set,
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.gpio_request_enable = imx_pmx_gpio_request_enable,
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.gpio_disable_free = imx_pmx_gpio_disable_free,
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.gpio_set_direction = imx_pmx_gpio_set_direction,
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};
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