This pull request contains Broadcom ARM64-based SoCs Device Tree fixes
for 4.18, please pull the following: - Scott fixes both the bcm958742k and bcm958742t reference boards to have the correct eMMC voltage specified - Ray fixes the I2C and PCIe Device Tree nodes interrupt specifiers for Northstar 2 and Stingray SoCs. -----BEGIN PGP SIGNATURE----- iQIcBAABCAAGBQJbKZC1AAoJEIfQlpxEBwcEqjgP/iU4LZ1YbWyKFCdlt+W/vBRN et0HvoLIcV64+2O2sEF/ynXNEjlwZa1ufDLQPMe71jIIqdY1Y0iB8F8Q8zvM24oJ BtrObia817/U7ksCrt0wbnvrj1nPrJAAf2C/Kc2xHJwDC5ClNUtlH9ojapBeuCA3 +wC9qYC4CJ30lwG+ICjVvZFxAu9cnpzdrQZ48opiNU9RS51iFZbPDcsfL+hDEJUI YvcC3gk69GcYl5jh9gUs7CaL7zWNGsvJp/ySf/l65yzsnz2PIyWoHLV1JsgRr72o VV/T3re3PlJteDFH7/HMsL1HKKgAIYEQNpd5YYrUVNoEHbtNyYd4pK4LvhZXnvkv gu1L6YbzPY5Wsiks7anfMRm1Rayn2cmy43+nmx6jDq8UzZYe58dOU6zHGcv1mlEW ygNX15ivgvUIr4/HYXbkCWzTZ+b6xNf9pvnbN2g5Jv24j+nz3+TL5uKdBIVpt8J7 mUzaH6L6+OQSyRxIqYgfp2yKPB1gKW55Ks6GssqwkpzF/32x1TUBpbvXyqo82A8t 2bzWbo3bOPguHuROopt5u4K2SzD/wgLWW14zZzhyxrkQvuA8fSOiww8UyaN8XIz0 4ydOcbhYthAM5sv38dJLE8QrUtWCR7FFeNGCqdTpxyR010YVEs2XZuEsw1sHW8Hq l+tg7yEelI1ij8BOwNg9 =7G4V -----END PGP SIGNATURE----- Merge tag 'arm-soc/for-4.18/devicetree-arm64-fixes' of https://github.com/Broadcom/stblinux into fixes This pull request contains Broadcom ARM64-based SoCs Device Tree fixes for 4.18, please pull the following: - Scott fixes both the bcm958742k and bcm958742t reference boards to have the correct eMMC voltage specified - Ray fixes the I2C and PCIe Device Tree nodes interrupt specifiers for Northstar 2 and Stingray SoCs. * tag 'arm-soc/for-4.18/devicetree-arm64-fixes' of https://github.com/Broadcom/stblinux: arm64: dts: Stingray: Fix I2C controller interrupt type arm64: dts: ns2: Fix PCIe controller interrupt type arm64: dts: ns2: Fix I2C controller interrupt type arm64: dts: specify 1.8V EMMC capabilities for bcm958742t arm64: dts: specify 1.8V EMMC capabilities for bcm958742k Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
commit
a6623f5f31
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@ -118,7 +118,7 @@ pcie0: pcie@20020000 {
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 281 IRQ_TYPE_NONE>;
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interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>;
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linux,pci-domain = <0>;
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@ -149,7 +149,7 @@ pcie4: pcie@50020000 {
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 305 IRQ_TYPE_NONE>;
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interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
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linux,pci-domain = <4>;
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@ -566,7 +566,7 @@ i2c0: i2c@66080000 {
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reg = <0x66080000 0x100>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <GIC_SPI 394 IRQ_TYPE_NONE>;
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interrupts = <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>;
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clock-frequency = <100000>;
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status = "disabled";
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};
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@ -594,7 +594,7 @@ i2c1: i2c@660b0000 {
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reg = <0x660b0000 0x100>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <GIC_SPI 395 IRQ_TYPE_NONE>;
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interrupts = <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>;
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clock-frequency = <100000>;
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status = "disabled";
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};
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@ -43,6 +43,10 @@ &gphy0 {
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enet-phy-lane-swap;
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};
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&sdio0 {
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mmc-ddr-1_8v;
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};
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&uart2 {
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status = "okay";
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};
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@ -42,3 +42,7 @@ / {
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&gphy0 {
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enet-phy-lane-swap;
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};
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&sdio0 {
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mmc-ddr-1_8v;
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};
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@ -409,7 +409,7 @@ i2c0: i2c@b0000 {
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reg = <0x000b0000 0x100>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <GIC_SPI 177 IRQ_TYPE_NONE>;
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interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>;
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clock-frequency = <100000>;
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status = "disabled";
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};
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@ -453,7 +453,7 @@ i2c1: i2c@e0000 {
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reg = <0x000e0000 0x100>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <GIC_SPI 178 IRQ_TYPE_NONE>;
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interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
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clock-frequency = <100000>;
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status = "disabled";
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};
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