KVM: arm/arm64: Enforce PTE mappings at stage2 when needed
commit6794ad5443
("KVM: arm/arm64: Fix unintended stage 2 PMD mappings") made the checks to skip huge mappings, stricter. However it introduced a bug where we still use huge mappings, ignoring the flag to use PTE mappings, by not reseting the vma_pagesize to PAGE_SIZE. Also, the checks do not cover the PUD huge pages, that was under review during the same period. This patch fixes both the issues. Fixes :6794ad5443
("KVM: arm/arm64: Fix unintended stage 2 PMD mappings") Reported-by: Zenghui Yu <yuzenghui@huawei.com> Cc: Zenghui Yu <yuzenghui@huawei.com> Cc: Christoffer Dall <christoffer.dall@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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@ -1594,8 +1594,9 @@ static void kvm_send_hwpoison_signal(unsigned long address,
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send_sig_mceerr(BUS_MCEERR_AR, (void __user *)address, lsb, current);
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}
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static bool fault_supports_stage2_pmd_mappings(struct kvm_memory_slot *memslot,
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unsigned long hva)
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static bool fault_supports_stage2_huge_mapping(struct kvm_memory_slot *memslot,
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unsigned long hva,
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unsigned long map_size)
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{
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gpa_t gpa_start;
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hva_t uaddr_start, uaddr_end;
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@ -1610,34 +1611,34 @@ static bool fault_supports_stage2_pmd_mappings(struct kvm_memory_slot *memslot,
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/*
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* Pages belonging to memslots that don't have the same alignment
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* within a PMD for userspace and IPA cannot be mapped with stage-2
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* PMD entries, because we'll end up mapping the wrong pages.
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* within a PMD/PUD for userspace and IPA cannot be mapped with stage-2
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* PMD/PUD entries, because we'll end up mapping the wrong pages.
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*
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* Consider a layout like the following:
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*
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* memslot->userspace_addr:
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* +-----+--------------------+--------------------+---+
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* |abcde|fgh Stage-1 PMD | Stage-1 PMD tv|xyz|
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* |abcde|fgh Stage-1 block | Stage-1 block tv|xyz|
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* +-----+--------------------+--------------------+---+
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*
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* memslot->base_gfn << PAGE_SIZE:
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* +---+--------------------+--------------------+-----+
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* |abc|def Stage-2 PMD | Stage-2 PMD |tvxyz|
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* |abc|def Stage-2 block | Stage-2 block |tvxyz|
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* +---+--------------------+--------------------+-----+
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*
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* If we create those stage-2 PMDs, we'll end up with this incorrect
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* If we create those stage-2 blocks, we'll end up with this incorrect
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* mapping:
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* d -> f
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* e -> g
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* f -> h
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*/
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if ((gpa_start & ~S2_PMD_MASK) != (uaddr_start & ~S2_PMD_MASK))
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if ((gpa_start & (map_size - 1)) != (uaddr_start & (map_size - 1)))
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return false;
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/*
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* Next, let's make sure we're not trying to map anything not covered
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* by the memslot. This means we have to prohibit PMD size mappings
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* for the beginning and end of a non-PMD aligned and non-PMD sized
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* by the memslot. This means we have to prohibit block size mappings
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* for the beginning and end of a non-block aligned and non-block sized
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* memory slot (illustrated by the head and tail parts of the
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* userspace view above containing pages 'abcde' and 'xyz',
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* respectively).
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@ -1646,8 +1647,8 @@ static bool fault_supports_stage2_pmd_mappings(struct kvm_memory_slot *memslot,
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* userspace_addr or the base_gfn, as both are equally aligned (per
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* the check above) and equally sized.
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*/
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return (hva & S2_PMD_MASK) >= uaddr_start &&
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(hva & S2_PMD_MASK) + S2_PMD_SIZE <= uaddr_end;
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return (hva & ~(map_size - 1)) >= uaddr_start &&
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(hva & ~(map_size - 1)) + map_size <= uaddr_end;
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}
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static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,
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@ -1676,12 +1677,6 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,
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return -EFAULT;
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}
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if (!fault_supports_stage2_pmd_mappings(memslot, hva))
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force_pte = true;
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if (logging_active)
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force_pte = true;
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/* Let's check if we will get back a huge page backed by hugetlbfs */
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down_read(¤t->mm->mmap_sem);
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vma = find_vma_intersection(current->mm, hva, hva + 1);
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@ -1692,6 +1687,12 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,
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}
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vma_pagesize = vma_kernel_pagesize(vma);
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if (logging_active ||
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!fault_supports_stage2_huge_mapping(memslot, hva, vma_pagesize)) {
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force_pte = true;
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vma_pagesize = PAGE_SIZE;
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}
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/*
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* The stage2 has a minimum of 2 level table (For arm64 see
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* kvm_arm_setup_stage2()). Hence, we are guaranteed that we can
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@ -1699,11 +1700,9 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,
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* As for PUD huge maps, we must make sure that we have at least
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* 3 levels, i.e, PMD is not folded.
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*/
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if ((vma_pagesize == PMD_SIZE ||
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(vma_pagesize == PUD_SIZE && kvm_stage2_has_pmd(kvm))) &&
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!force_pte) {
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if (vma_pagesize == PMD_SIZE ||
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(vma_pagesize == PUD_SIZE && kvm_stage2_has_pmd(kvm)))
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gfn = (fault_ipa & huge_page_mask(hstate_vma(vma))) >> PAGE_SHIFT;
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}
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up_read(¤t->mm->mmap_sem);
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/* We need minimum second+third level pages */
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