drm/i915: Fix VLV CRC reading.
Adding missing Display mmio reg offset. Credits-to: Laws, Philip <philip.laws@intel.com> Cc: He, Shuang <shuang.he@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -2627,7 +2627,7 @@ enum punit_power_well {
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#define PORT_DFT_I9XX 0x61150
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#define DC_BALANCE_RESET (1 << 25)
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#define PORT_DFT2_G4X 0x61154
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#define PORT_DFT2_G4X (dev_priv->info.display_mmio_offset + 0x61154)
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#define DC_BALANCE_RESET_VLV (1 << 31)
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#define PIPE_SCRAMBLE_RESET_MASK (0x3 << 0)
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#define PIPE_B_SCRAMBLE_RESET (1 << 1)
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