diff --git a/drivers/clk/clk-cdce706.c b/drivers/clk/clk-cdce706.c index f21d9092564f..476d29c013e5 100644 --- a/drivers/clk/clk-cdce706.c +++ b/drivers/clk/clk-cdce706.c @@ -633,7 +633,7 @@ of_clk_cdce_get(struct of_phandle_args *clkspec, void *data) static int cdce706_probe(struct i2c_client *client, const struct i2c_device_id *id) { - struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent); + struct i2c_adapter *adapter = client->adapter; struct cdce706_dev_data *cdce; int ret; diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c index 4739a47ec8bd..0dfac393588b 100644 --- a/drivers/clk/clk-qoriq.c +++ b/drivers/clk/clk-qoriq.c @@ -637,6 +637,17 @@ static const struct clockgen_chipinfo chipinfo[] = { .pll_mask = 0x37, .flags = CG_VER3 | CG_LITTLE_ENDIAN, }, + { + .compat = "fsl,lx2160a-clockgen", + .cmux_groups = { + &clockgen2_cmux_cga12, &clockgen2_cmux_cgb + }, + .cmux_to_group = { + 0, 0, 0, 0, 1, 1, 1, 1, -1 + }, + .pll_mask = 0x37, + .flags = CG_VER3 | CG_LITTLE_ENDIAN, + }, { .compat = "fsl,p2041-clockgen", .guts_compat = "fsl,qoriq-device-config-1.0", @@ -1496,6 +1507,7 @@ CLK_OF_DECLARE(qoriq_clockgen_ls1043a, "fsl,ls1043a-clockgen", clockgen_init); CLK_OF_DECLARE(qoriq_clockgen_ls1046a, "fsl,ls1046a-clockgen", clockgen_init); CLK_OF_DECLARE(qoriq_clockgen_ls1088a, "fsl,ls1088a-clockgen", clockgen_init); CLK_OF_DECLARE(qoriq_clockgen_ls2080a, "fsl,ls2080a-clockgen", clockgen_init); +CLK_OF_DECLARE(qoriq_clockgen_lx2160a, "fsl,lx2160a-clockgen", clockgen_init); CLK_OF_DECLARE(qoriq_clockgen_p2041, "fsl,p2041-clockgen", clockgen_init); CLK_OF_DECLARE(qoriq_clockgen_p3041, "fsl,p3041-clockgen", clockgen_init); CLK_OF_DECLARE(qoriq_clockgen_p4080, "fsl,p4080-clockgen", clockgen_init); diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index fb2d247e83aa..8fd7d83db0d3 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -1324,10 +1324,7 @@ static void clk_core_init_rate_req(struct clk_core * const core, static bool clk_core_can_round(struct clk_core * const core) { - if (core->ops->determine_rate || core->ops->round_rate) - return true; - - return false; + return core->ops->determine_rate || core->ops->round_rate; } static int clk_core_round_rate_nolock(struct clk_core *core, @@ -3045,6 +3042,17 @@ static int possible_parents_show(struct seq_file *s, void *data) } DEFINE_SHOW_ATTRIBUTE(possible_parents); +static int current_parent_show(struct seq_file *s, void *data) +{ + struct clk_core *core = s->private; + + if (core->parent) + seq_printf(s, "%s\n", core->parent->name); + + return 0; +} +DEFINE_SHOW_ATTRIBUTE(current_parent); + static int clk_duty_cycle_show(struct seq_file *s, void *data) { struct clk_core *core = s->private; @@ -3077,6 +3085,10 @@ static void clk_debug_create_one(struct clk_core *core, struct dentry *pdentry) debugfs_create_file("clk_duty_cycle", 0444, root, core, &clk_duty_cycle_fops); + if (core->num_parents > 0) + debugfs_create_file("clk_parent", 0444, root, core, + ¤t_parent_fops); + if (core->num_parents > 1) debugfs_create_file("clk_possible_parents", 0444, root, core, &possible_parents_fops); diff --git a/drivers/clk/mediatek/clk-mt8516.c b/drivers/clk/mediatek/clk-mt8516.c index 26fe43cc9ea2..9d4261ecc760 100644 --- a/drivers/clk/mediatek/clk-mt8516.c +++ b/drivers/clk/mediatek/clk-mt8516.c @@ -231,11 +231,6 @@ static const char * const nfi1x_pad_parents[] __initconst = { "nfi1x_ck" }; -static const char * const ddrphycfg_parents[] __initconst = { - "clk26m_ck", - "mainpll_d16" -}; - static const char * const usb_78m_parents[] __initconst = { "clk_null", "clk26m_ck", diff --git a/drivers/clk/mmp/clk-frac.c b/drivers/clk/mmp/clk-frac.c index cb43d54735b0..90bf181f191a 100644 --- a/drivers/clk/mmp/clk-frac.c +++ b/drivers/clk/mmp/clk-frac.c @@ -78,11 +78,10 @@ static int clk_factor_set_rate(struct clk_hw *hw, unsigned long drate, struct mmp_clk_factor_masks *masks = factor->masks; int i; unsigned long val; - unsigned long prev_rate, rate = 0; + unsigned long rate = 0; unsigned long flags = 0; for (i = 0; i < factor->ftbl_cnt; i++) { - prev_rate = rate; rate = (((prate / 10000) * factor->ftbl[i].den) / (factor->ftbl[i].num * factor->masks->factor)) * 10000; if (rate > drate) diff --git a/drivers/clk/qcom/gcc-msm8996.c b/drivers/clk/qcom/gcc-msm8996.c index 4632b9272b7f..292d7214a226 100644 --- a/drivers/clk/qcom/gcc-msm8996.c +++ b/drivers/clk/qcom/gcc-msm8996.c @@ -138,22 +138,6 @@ static const char * const gcc_xo_gpll0_gpll4_gpll0_early_div[] = { "gpll0_early_div" }; -static const struct parent_map gcc_xo_gpll0_gpll2_gpll3_gpll0_early_div_map[] = { - { P_XO, 0 }, - { P_GPLL0, 1 }, - { P_GPLL2, 2 }, - { P_GPLL3, 3 }, - { P_GPLL0_EARLY_DIV, 6 } -}; - -static const char * const gcc_xo_gpll0_gpll2_gpll3_gpll0_early_div[] = { - "xo", - "gpll0", - "gpll2", - "gpll3", - "gpll0_early_div" -}; - static const struct parent_map gcc_xo_gpll0_gpll1_early_div_gpll1_gpll4_gpll0_early_div_map[] = { { P_XO, 0 }, { P_GPLL0, 1 }, @@ -192,26 +176,6 @@ static const char * const gcc_xo_gpll0_gpll2_gpll3_gpll1_gpll2_early_gpll0_early "gpll0_early_div" }; -static const struct parent_map gcc_xo_gpll0_gpll2_gpll3_gpll1_gpll4_gpll0_early_div_map[] = { - { P_XO, 0 }, - { P_GPLL0, 1 }, - { P_GPLL2, 2 }, - { P_GPLL3, 3 }, - { P_GPLL1, 4 }, - { P_GPLL4, 5 }, - { P_GPLL0_EARLY_DIV, 6 } -}; - -static const char * const gcc_xo_gpll0_gpll2_gpll3_gpll1_gpll4_gpll0_early_div[] = { - "xo", - "gpll0", - "gpll2", - "gpll3", - "gpll1", - "gpll4", - "gpll0_early_div" -}; - static struct clk_fixed_factor xo = { .mult = 1, .div = 1, diff --git a/drivers/clk/ti/divider.c b/drivers/clk/ti/divider.c index 4786e0ebc2e8..6cb863c13648 100644 --- a/drivers/clk/ti/divider.c +++ b/drivers/clk/ti/divider.c @@ -425,91 +425,6 @@ int ti_clk_parse_divider_data(int *div_table, int num_dividers, int max_div, return 0; } -static const struct clk_div_table * -_get_div_table_from_setup(struct ti_clk_divider *setup, u8 *width) -{ - const struct clk_div_table *table = NULL; - - ti_clk_parse_divider_data(setup->dividers, setup->num_dividers, - setup->max_div, setup->flags, width, - &table); - - return table; -} - -struct clk_hw *ti_clk_build_component_div(struct ti_clk_divider *setup) -{ - struct clk_omap_divider *div; - struct clk_omap_reg *reg; - int ret; - - if (!setup) - return NULL; - - div = kzalloc(sizeof(*div), GFP_KERNEL); - if (!div) - return ERR_PTR(-ENOMEM); - - reg = (struct clk_omap_reg *)&div->reg; - reg->index = setup->module; - reg->offset = setup->reg; - - if (setup->flags & CLKF_INDEX_STARTS_AT_ONE) - div->flags |= CLK_DIVIDER_ONE_BASED; - - if (setup->flags & CLKF_INDEX_POWER_OF_TWO) - div->flags |= CLK_DIVIDER_POWER_OF_TWO; - - div->table = _get_div_table_from_setup(setup, &div->width); - if (IS_ERR(div->table)) { - ret = PTR_ERR(div->table); - kfree(div); - return ERR_PTR(ret); - } - - - div->shift = setup->bit_shift; - div->latch = -EINVAL; - - return &div->hw; -} - -struct clk *ti_clk_register_divider(struct ti_clk *setup) -{ - struct ti_clk_divider *div = setup->data; - struct clk_omap_reg reg = { - .index = div->module, - .offset = div->reg, - }; - u8 width; - u32 flags = 0; - u8 div_flags = 0; - const struct clk_div_table *table; - struct clk *clk; - - if (div->flags & CLKF_INDEX_STARTS_AT_ONE) - div_flags |= CLK_DIVIDER_ONE_BASED; - - if (div->flags & CLKF_INDEX_POWER_OF_TWO) - div_flags |= CLK_DIVIDER_POWER_OF_TWO; - - if (div->flags & CLKF_SET_RATE_PARENT) - flags |= CLK_SET_RATE_PARENT; - - table = _get_div_table_from_setup(div, &width); - if (IS_ERR(table)) - return (struct clk *)table; - - clk = _register_divider(NULL, setup->name, div->parent, - flags, ®, div->bit_shift, - width, -EINVAL, div_flags, table); - - if (IS_ERR(clk)) - kfree(table); - - return clk; -} - static struct clk_div_table * __init ti_clk_get_div_table(struct device_node *node) { diff --git a/drivers/clk/ti/gate.c b/drivers/clk/ti/gate.c index 504c0e91cdc7..42389558418c 100644 --- a/drivers/clk/ti/gate.c +++ b/drivers/clk/ti/gate.c @@ -131,36 +131,6 @@ static struct clk *_register_gate(struct device *dev, const char *name, return clk; } -struct clk_hw *ti_clk_build_component_gate(struct ti_clk_gate *setup) -{ - struct clk_hw_omap *gate; - struct clk_omap_reg *reg; - const struct clk_hw_omap_ops *ops = &clkhwops_wait; - - if (!setup) - return NULL; - - gate = kzalloc(sizeof(*gate), GFP_KERNEL); - if (!gate) - return ERR_PTR(-ENOMEM); - - reg = (struct clk_omap_reg *)&gate->enable_reg; - reg->index = setup->module; - reg->offset = setup->reg; - - gate->enable_bit = setup->bit_shift; - - if (setup->flags & CLKF_NO_WAIT) - ops = NULL; - - if (setup->flags & CLKF_INTERFACE) - ops = &clkhwops_iclk_wait; - - gate->ops = ops; - - return &gate->hw; -} - static void __init _of_ti_gate_clk_setup(struct device_node *node, const struct clk_ops *ops, const struct clk_hw_omap_ops *hw_ops) diff --git a/drivers/clk/ti/mux.c b/drivers/clk/ti/mux.c index b7f9a4f068bf..0069e7cf3ebc 100644 --- a/drivers/clk/ti/mux.c +++ b/drivers/clk/ti/mux.c @@ -164,37 +164,6 @@ static struct clk *_register_mux(struct device *dev, const char *name, return clk; } -struct clk *ti_clk_register_mux(struct ti_clk *setup) -{ - struct ti_clk_mux *mux; - u32 flags; - u8 mux_flags = 0; - struct clk_omap_reg reg; - u32 mask; - - mux = setup->data; - flags = CLK_SET_RATE_NO_REPARENT; - - mask = mux->num_parents; - if (!(mux->flags & CLKF_INDEX_STARTS_AT_ONE)) - mask--; - - mask = (1 << fls(mask)) - 1; - reg.index = mux->module; - reg.offset = mux->reg; - reg.ptr = NULL; - - if (mux->flags & CLKF_INDEX_STARTS_AT_ONE) - mux_flags |= CLK_MUX_INDEX_ONE; - - if (mux->flags & CLKF_SET_RATE_PARENT) - flags |= CLK_SET_RATE_PARENT; - - return _register_mux(NULL, setup->name, mux->parents, mux->num_parents, - flags, ®, mux->bit_shift, mask, -EINVAL, - mux_flags, NULL); -} - /** * of_mux_clk_setup - Setup function for simple mux rate clock * @node: DT node for the clock