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clk: meson: g12a: add controller register init 

Add the MPLL common register initial setting

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
This commit is contained in:
Jerome Brunet 2019-05-13 14:31:15 +02:00
parent 19a18d42bf
commit a9f7b1993b
1 changed files with 7 additions and 1 deletions
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8
drivers/clk/meson/g12a.c
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@ -2992,10 +2992,16 @@ static struct clk_regmap *const g12a_clk_regmaps[] = {
&g12a_vdec_hevcf,
};
static const struct reg_sequence g12a_init_regs[] = {
{ .reg = HHI_MPLL_CNTL0, .def = 0x00000543 },
};
static const struct meson_eeclkc_data g12a_clkc_data = {
.regmap_clks = g12a_clk_regmaps,
.regmap_clk_num = ARRAY_SIZE(g12a_clk_regmaps),
.hw_onecell_data = &g12a_hw_onecell_data
.hw_onecell_data = &g12a_hw_onecell_data,
.init_regs = g12a_init_regs,
.init_count = ARRAY_SIZE(g12a_init_regs),
};
static const struct of_device_id clkc_match_table[] = {