KVM: PPC: MPIC: Reset IRQ source private members
When we reset the in-kernel MPIC controller, we forget to reset some hidden state such as destmask and output. This state is usually set when the guest writes to the IDR register for a specific IRQ line. To make sure we stay in sync and don't forget hidden state, treat reset of the IDR register as a simple write of the IDR register. That automatically updates all the hidden state as well. Reported-by: Paul Janzen <pcj@pauljanzen.org> Signed-off-by: Alexander Graf <agraf@suse.de>
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@ -126,6 +126,8 @@ static int openpic_cpu_write_internal(void *opaque, gpa_t addr,
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u32 val, int idx);
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static int openpic_cpu_read_internal(void *opaque, gpa_t addr,
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u32 *ptr, int idx);
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static inline void write_IRQreg_idr(struct openpic *opp, int n_IRQ,
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uint32_t val);
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enum irq_type {
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IRQ_TYPE_NORMAL = 0,
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@ -528,7 +530,6 @@ static void openpic_reset(struct openpic *opp)
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/* Initialise IRQ sources */
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for (i = 0; i < opp->max_irq; i++) {
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opp->src[i].ivpr = opp->ivpr_reset;
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opp->src[i].idr = opp->idr_reset;
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switch (opp->src[i].type) {
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case IRQ_TYPE_NORMAL:
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@ -543,6 +544,8 @@ static void openpic_reset(struct openpic *opp)
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case IRQ_TYPE_FSLSPECIAL:
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break;
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}
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write_IRQreg_idr(opp, i, opp->idr_reset);
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}
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/* Initialise IRQ destinations */
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for (i = 0; i < MAX_CPU; i++) {
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