Amlogic 32-bit DT changes for v4.13:
- minor reorganization to support different busses - add/use real clock controller -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAABCAAGBQJZQW1yAAoJEFk3GJrT+8ZloYUP/24OL8focZDhH6ehDYi3rQPb qddthnw/dlvSX1fS1U1HYNvBzKs5yUaKLNsD4d1Zq9Ldc3eDgnss7hT3l4H+lUdK DzxkwHhSdqwuxB/d6v2YcpP7IEUUflmKWhltr1Em7528zHTUnIbxwYt+afPYU2kb C1HQ+M1L7ehf1w5A0MlyRTVukYKAfs8IJ7Sp2Zw/BGNH+vW11Ao83Suy45lbT6Ce v5fiRBAAXdr0XnSF68g1/LkTN1tPy5wHDPBNCPG9lU2TUvidjOb33r2ICG8jDwna FuHo3spLn+O02VtisDp42b6cLN2nMsyWyNObkpfvMCddR1MAn4efygVehcm568wI qndAZJB54qcYRk5gUji1pEklqicnZXXLFZtQq0MITbBXVRXu0XapxE+sik9fOXw4 XFt5+trVbPVqJ/O2MiG12HiPSc5Wbudwen3ihqpzMKOxoKjOCEBaEiaOmQmUQ2/q zELTcMdiYeetebAG1iLddSydmDGoru+HoPBLNAsFZ2IHv+TGtYYNcFJlnSPiApSv rAYk5hGhubamLP9Y8UZQyeDhwFNLNIqVOJ+WZhxjAJPxMNaKZCoxkgXOiq0r+Otk 4NF3+tPrAEqMPmmUPL5ME/RQ4v2+QL8iHjXB8A1nnb62cI6jPpbYV/xmLx8Dpmkv HWFjc+EA+tU77fqaPso8 =3gA0 -----END PGP SIGNATURE----- Merge tag 'amlogic-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt Amlogic 32-bit DT changes for v4.13: - minor reorganization to support different busses - add/use real clock controller * tag 'amlogic-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: ARM: dts: meson8: add and use the real clock controller ARM: dts: meson: Extend L2 cache controller node for Meson8 and Meson8b ARM: dts: meson8b: inherit meson.dtsi from meson8b.dtsi ARM: dts: meson: organize devices in their corresponding busses Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
commit
ada0cc63dc
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@ -65,100 +65,108 @@ gic: interrupt-controller@c4301000 {
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#interrupt-cells = <3>;
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};
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timer@c1109940 {
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compatible = "amlogic,meson6-timer";
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reg = <0xc1109940 0x18>;
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interrupts = <0 10 1>;
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};
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soc {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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wdt: watchdog@c1109900 {
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compatible = "amlogic,meson6-wdt";
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reg = <0xc1109900 0x8>;
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interrupts = <0 0 1>;
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};
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uart_AO: serial@c81004c0 {
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compatible = "amlogic,meson-uart";
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reg = <0xc81004c0 0x18>;
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interrupts = <0 90 1>;
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clocks = <&clk81>;
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status = "disabled";
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};
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uart_A: serial@c11084c0 {
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compatible = "amlogic,meson-uart";
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reg = <0xc11084c0 0x18>;
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interrupts = <0 26 1>;
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clocks = <&clk81>;
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status = "disabled";
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};
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uart_B: serial@c11084dc {
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compatible = "amlogic,meson-uart";
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reg = <0xc11084dc 0x18>;
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interrupts = <0 75 1>;
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clocks = <&clk81>;
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status = "disabled";
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};
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uart_C: serial@c1108700 {
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compatible = "amlogic,meson-uart";
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reg = <0xc1108700 0x18>;
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interrupts = <0 93 1>;
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clocks = <&clk81>;
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status = "disabled";
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};
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i2c_AO: i2c@c8100500 {
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compatible = "amlogic,meson6-i2c";
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reg = <0xc8100500 0x20>;
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interrupts = <0 92 1>;
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clocks = <&clk81>;
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cbus: cbus@c1100000 {
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compatible = "simple-bus";
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reg = <0xc1100000 0x200000>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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#size-cells = <1>;
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ranges = <0x0 0xc1100000 0x200000>;
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uart_A: serial@84c0 {
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compatible = "amlogic,meson-uart";
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reg = <0x84c0 0x18>;
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interrupts = <0 26 1>;
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status = "disabled";
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};
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uart_B: serial@84dc {
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compatible = "amlogic,meson-uart";
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reg = <0x84dc 0x18>;
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interrupts = <0 75 1>;
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status = "disabled";
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};
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i2c_A: i2c@8500 {
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compatible = "amlogic,meson6-i2c";
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reg = <0x8500 0x20>;
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interrupts = <0 21 1>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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uart_C: serial@8700 {
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compatible = "amlogic,meson-uart";
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reg = <0x8700 0x18>;
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interrupts = <0 93 1>;
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status = "disabled";
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};
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i2c_B: i2c@87c0 {
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compatible = "amlogic,meson6-i2c";
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reg = <0x87c0 0x20>;
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interrupts = <0 128 1>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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spifc: spi@8c80 {
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compatible = "amlogic,meson6-spifc";
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reg = <0x8c80 0x80>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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wdt: watchdog@9900 {
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compatible = "amlogic,meson6-wdt";
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reg = <0x9900 0x8>;
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interrupts = <0 0 1>;
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};
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timer@9940 {
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compatible = "amlogic,meson6-timer";
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reg = <0x9940 0x18>;
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interrupts = <0 10 1>;
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};
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};
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i2c_A: i2c@c1108500 {
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compatible = "amlogic,meson6-i2c";
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reg = <0xc1108500 0x20>;
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interrupts = <0 21 1>;
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clocks = <&clk81>;
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aobus: aobus@c8100000 {
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compatible = "simple-bus";
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reg = <0xc8100000 0x100000>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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#size-cells = <1>;
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ranges = <0x0 0xc8100000 0x100000>;
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i2c_B: i2c@c11087c0 {
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compatible = "amlogic,meson6-i2c";
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reg = <0xc11087c0 0x20>;
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interrupts = <0 128 1>;
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clocks = <&clk81>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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ir_receiver: ir-receiver@480 {
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compatible= "amlogic,meson6-ir";
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reg = <0x480 0x20>;
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interrupts = <0 15 1>;
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status = "disabled";
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};
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ir_receiver: ir-receiver@c8100480 {
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compatible= "amlogic,meson6-ir";
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reg = <0xc8100480 0x20>;
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interrupts = <0 15 1>;
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status = "disabled";
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};
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uart_AO: serial@4c0 {
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compatible = "amlogic,meson-uart";
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reg = <0x4c0 0x18>;
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interrupts = <0 90 1>;
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status = "disabled";
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};
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spifc: spi@c1108c80 {
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compatible = "amlogic,meson6-spifc";
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reg = <0xc1108c80 0x80>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&clk81>;
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status = "disabled";
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i2c_AO: i2c@500 {
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compatible = "amlogic,meson6-i2c";
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reg = <0x500 0x20>;
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interrupts = <0 92 1>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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};
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ethmac: ethernet@c9410000 {
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@ -167,8 +175,6 @@ ethmac: ethernet@c9410000 {
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0xc1108108 0x4>;
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interrupts = <0 8 1>;
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interrupt-names = "macirq";
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clocks = <&clk81>;
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clock-names = "stmmaceth";
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status = "disabled";
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};
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};
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@ -51,8 +51,6 @@ / {
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model = "Amlogic Meson6 SoC";
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compatible = "amlogic,meson6";
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interrupt-parent = <&gic>;
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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@ -43,6 +43,7 @@
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include <dt-bindings/clock/meson8b-clkc.h>
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#include <dt-bindings/gpio/meson8-gpio.h>
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/include/ "meson.dtsi"
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@ -50,8 +51,6 @@ / {
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model = "Amlogic Meson8 SoC";
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compatible = "amlogic,meson8";
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interrupt-parent = <&gic>;
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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@ -84,25 +83,61 @@ cpu@203 {
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reg = <0x203>;
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};
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};
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}; /* end of / */
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clk81: clk@0 {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <141666666>;
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};
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pinctrl_cbus: pinctrl@c1109880 {
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compatible = "amlogic,meson8-cbus-pinctrl";
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reg = <0xc1109880 0x10>;
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&aobus {
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pinctrl_aobus: pinctrl@84 {
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compatible = "amlogic,meson8-aobus-pinctrl";
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reg = <0x84 0xc>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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gpio: banks@c11080b0 {
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reg = <0xc11080b0 0x28>,
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<0xc11080e8 0x18>,
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<0xc1108120 0x18>,
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<0xc1108030 0x30>;
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gpio_ao: ao-bank@14 {
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reg = <0x14 0x4>,
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<0x2c 0x4>,
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<0x24 0x8>;
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reg-names = "mux", "pull", "gpio";
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gpio-controller;
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#gpio-cells = <2>;
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gpio-ranges = <&pinctrl_aobus 0 120 16>;
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};
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uart_ao_a_pins: uart_ao_a {
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mux {
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groups = "uart_tx_ao_a", "uart_rx_ao_a";
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function = "uart_ao";
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};
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};
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i2c_ao_pins: i2c_mst_ao {
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mux {
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groups = "i2c_mst_sck_ao", "i2c_mst_sda_ao";
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function = "i2c_mst_ao";
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};
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};
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};
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};
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&cbus {
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clkc: clock-controller@4000 {
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#clock-cells = <1>;
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compatible = "amlogic,meson8-clkc";
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reg = <0x8000 0x4>, <0x4000 0x460>;
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};
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pinctrl_cbus: pinctrl@9880 {
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compatible = "amlogic,meson8-cbus-pinctrl";
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reg = <0x9880 0x10>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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gpio: banks@80b0 {
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reg = <0x80b0 0x28>,
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<0x80e8 0x18>,
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<0x8120 0x18>,
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<0x8030 0x30>;
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reg-names = "mux", "pull", "pull-enable", "gpio";
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gpio-controller;
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#gpio-cells = <2>;
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@ -134,36 +169,47 @@ mux {
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};
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};
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};
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};
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pinctrl_aobus: pinctrl@c8100084 {
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compatible = "amlogic,meson8-aobus-pinctrl";
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reg = <0xc8100084 0xc>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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ðmac {
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clocks = <&clkc CLKID_CLK81>;
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clock-names = "stmmaceth";
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};
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gpio_ao: ao-bank@c1108030 {
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reg = <0xc8100014 0x4>,
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<0xc810002c 0x4>,
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<0xc8100024 0x8>;
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reg-names = "mux", "pull", "gpio";
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gpio-controller;
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#gpio-cells = <2>;
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gpio-ranges = <&pinctrl_aobus 0 120 16>;
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};
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&i2c_AO {
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clocks = <&clkc CLKID_CLK81>;
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};
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uart_ao_a_pins: uart_ao_a {
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mux {
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groups = "uart_tx_ao_a", "uart_rx_ao_a";
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function = "uart_ao";
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};
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};
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&i2c_A {
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clocks = <&clkc CLKID_CLK81>;
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};
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i2c_ao_pins: i2c_mst_ao {
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mux {
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groups = "i2c_mst_sck_ao", "i2c_mst_sda_ao";
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function = "i2c_mst_ao";
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};
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};
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};
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}; /* end of / */
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&i2c_B {
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clocks = <&clkc CLKID_CLK81>;
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};
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&L2 {
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arm,data-latency = <3 3 3>;
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arm,tag-latency = <2 2 2>;
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arm,filter-ranges = <0x100000 0xc0000000>;
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};
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&spifc {
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clocks = <&clkc CLKID_CLK81>;
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};
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&uart_AO {
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clocks = <&clkc CLKID_CLK81>;
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};
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&uart_A {
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clocks = <&clkc CLKID_CLK81>;
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};
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&uart_B {
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clocks = <&clkc CLKID_CLK81>;
|
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};
|
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|
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&uart_C {
|
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clocks = <&clkc CLKID_CLK81>;
|
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};
|
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|
|
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@ -47,11 +47,9 @@
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#include <dt-bindings/clock/meson8b-clkc.h>
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#include <dt-bindings/gpio/meson8b-gpio.h>
|
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#include <dt-bindings/reset/amlogic,meson8b-reset.h>
|
||||
#include "skeleton.dtsi"
|
||||
#include "meson.dtsi"
|
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|
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/ {
|
||||
interrupt-parent = <&gic>;
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
|
@ -84,147 +82,113 @@ cpu@203 {
|
|||
reg = <0x203>;
|
||||
};
|
||||
};
|
||||
}; /* end of / */
|
||||
|
||||
soc {
|
||||
compatible = "simple-bus";
|
||||
&aobus {
|
||||
pinctrl_aobus: pinctrl@84 {
|
||||
compatible = "amlogic,meson8b-aobus-pinctrl";
|
||||
reg = <0x84 0xc>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
L2: l2-cache-controller@c4200000 {
|
||||
compatible = "arm,pl310-cache";
|
||||
reg = <0xc4200000 0x1000>;
|
||||
cache-unified;
|
||||
cache-level = <2>;
|
||||
gpio_ao: ao-bank@14 {
|
||||
reg = <0x14 0x4>,
|
||||
<0x2c 0x4>,
|
||||
<0x24 0x8>;
|
||||
reg-names = "mux", "pull", "gpio";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
gpio-ranges = <&pinctrl_aobus 0 130 16>;
|
||||
};
|
||||
|
||||
gic: interrupt-controller@c4301000 {
|
||||
compatible = "arm,cortex-a9-gic";
|
||||
reg = <0xc4301000 0x1000>,
|
||||
<0xc4300100 0x0100>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <3>;
|
||||
};
|
||||
|
||||
reset: reset-controller@c1104404 {
|
||||
compatible = "amlogic,meson8b-reset";
|
||||
reg = <0xc1104404 0x20>;
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
|
||||
wdt: watchdog@c1109900 {
|
||||
compatible = "amlogic,meson8b-wdt";
|
||||
reg = <0xc1109900 0x8>;
|
||||
interrupts = <0 0 1>;
|
||||
};
|
||||
|
||||
timer@c1109940 {
|
||||
compatible = "amlogic,meson6-timer";
|
||||
reg = <0xc1109940 0x18>;
|
||||
interrupts = <0 10 1>;
|
||||
};
|
||||
|
||||
uart_AO: serial@c81004c0 {
|
||||
compatible = "amlogic,meson-uart";
|
||||
reg = <0xc81004c0 0x18>;
|
||||
interrupts = <0 90 1>;
|
||||
clocks = <&clkc CLKID_CLK81>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart_A: serial@c11084c0 {
|
||||
compatible = "amlogic,meson-uart";
|
||||
reg = <0xc11084c0 0x18>;
|
||||
interrupts = <0 26 1>;
|
||||
clocks = <&clkc CLKID_CLK81>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart_B: serial@c11084dc {
|
||||
compatible = "amlogic,meson-uart";
|
||||
reg = <0xc11084dc 0x18>;
|
||||
interrupts = <0 75 1>;
|
||||
clocks = <&clkc CLKID_CLK81>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart_C: serial@c1108700 {
|
||||
compatible = "amlogic,meson-uart";
|
||||
reg = <0xc1108700 0x18>;
|
||||
interrupts = <0 93 1>;
|
||||
clocks = <&clkc CLKID_CLK81>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
clkc: clock-controller@c1104000 {
|
||||
#clock-cells = <1>;
|
||||
compatible = "amlogic,meson8b-clkc";
|
||||
reg = <0xc1108000 0x4>, <0xc1104000 0x460>;
|
||||
};
|
||||
|
||||
pwm_ab: pwm@8550 {
|
||||
compatible = "amlogic,meson8b-pwm";
|
||||
reg = <0xc1108550 0x10>;
|
||||
#pwm-cells = <3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pwm_cd: pwm@8650 {
|
||||
compatible = "amlogic,meson8b-pwm";
|
||||
reg = <0xc1108650 0x10>;
|
||||
#pwm-cells = <3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pwm_ef: pwm@86c0 {
|
||||
compatible = "amlogic,meson8b-pwm";
|
||||
reg = <0xc11086c0 0x10>;
|
||||
#pwm-cells = <3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pinctrl_cbus: pinctrl@c1109880 {
|
||||
compatible = "amlogic,meson8b-cbus-pinctrl";
|
||||
reg = <0xc1109880 0x10>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
gpio: banks@c11080b0 {
|
||||
reg = <0xc11080b0 0x28>,
|
||||
<0xc11080e8 0x18>,
|
||||
<0xc1108120 0x18>,
|
||||
<0xc1108030 0x38>;
|
||||
reg-names = "mux", "pull", "pull-enable", "gpio";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
gpio-ranges = <&pinctrl_cbus 0 0 130>;
|
||||
};
|
||||
};
|
||||
|
||||
pinctrl_aobus: pinctrl@c8100084 {
|
||||
compatible = "amlogic,meson8b-aobus-pinctrl";
|
||||
reg = <0xc8100084 0xc>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
gpio_ao: ao-bank@c1108030 {
|
||||
reg = <0xc8100014 0x4>,
|
||||
<0xc810002c 0x4>,
|
||||
<0xc8100024 0x8>;
|
||||
reg-names = "mux", "pull", "gpio";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
gpio-ranges = <&pinctrl_aobus 0 130 16>;
|
||||
};
|
||||
|
||||
uart_ao_a_pins: uart_ao_a {
|
||||
mux {
|
||||
groups = "uart_tx_ao_a", "uart_rx_ao_a";
|
||||
function = "uart_ao";
|
||||
};
|
||||
uart_ao_a_pins: uart_ao_a {
|
||||
mux {
|
||||
groups = "uart_tx_ao_a", "uart_rx_ao_a";
|
||||
function = "uart_ao";
|
||||
};
|
||||
};
|
||||
};
|
||||
}; /* end of / */
|
||||
};
|
||||
|
||||
&cbus {
|
||||
clkc: clock-controller@4000 {
|
||||
#clock-cells = <1>;
|
||||
compatible = "amlogic,meson8b-clkc";
|
||||
reg = <0x8000 0x4>, <0x4000 0x460>;
|
||||
};
|
||||
|
||||
reset: reset-controller@4404 {
|
||||
compatible = "amlogic,meson8b-reset";
|
||||
reg = <0x4404 0x20>;
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
|
||||
pwm_ab: pwm@8550 {
|
||||
compatible = "amlogic,meson8b-pwm";
|
||||
reg = <0x8550 0x10>;
|
||||
#pwm-cells = <3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pwm_cd: pwm@8650 {
|
||||
compatible = "amlogic,meson8b-pwm";
|
||||
reg = <0x8650 0x10>;
|
||||
#pwm-cells = <3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pwm_ef: pwm@86c0 {
|
||||
compatible = "amlogic,meson8b-pwm";
|
||||
reg = <0x86c0 0x10>;
|
||||
#pwm-cells = <3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
wdt: watchdog@9900 {
|
||||
compatible = "amlogic,meson8b-wdt";
|
||||
reg = <0x9900 0x8>;
|
||||
interrupts = <0 0 1>;
|
||||
};
|
||||
|
||||
pinctrl_cbus: pinctrl@9880 {
|
||||
compatible = "amlogic,meson8b-cbus-pinctrl";
|
||||
reg = <0x9880 0x10>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
gpio: banks@80b0 {
|
||||
reg = <0x80b0 0x28>,
|
||||
<0x80e8 0x18>,
|
||||
<0x8120 0x18>,
|
||||
<0x8030 0x38>;
|
||||
reg-names = "mux", "pull", "pull-enable", "gpio";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
gpio-ranges = <&pinctrl_cbus 0 0 130>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&L2 {
|
||||
arm,data-latency = <3 3 3>;
|
||||
arm,tag-latency = <2 2 2>;
|
||||
arm,filter-ranges = <0x100000 0xc0000000>;
|
||||
};
|
||||
|
||||
&uart_AO {
|
||||
clocks = <&clkc CLKID_CLK81>;
|
||||
};
|
||||
|
||||
&uart_A {
|
||||
clocks = <&clkc CLKID_CLK81>;
|
||||
};
|
||||
|
||||
&uart_B {
|
||||
clocks = <&clkc CLKID_CLK81>;
|
||||
};
|
||||
|
||||
&uart_C {
|
||||
clocks = <&clkc CLKID_CLK81>;
|
||||
};
|
||||
|
|
|
|||
Loading…
Reference in New Issue