p71924506
/
linux_old1
1
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

ARM: SoC platform updates for 4.16 

These are mostly minor bugfixes, cleanup and many defconfig updates to
 support added drivers. In particular OMAP and PXA keep cleaning up the
 legacy code base, as usual.
 
 Nvidia adds some more SoC support code for Tegra 186.
 
 For the first time on years, we are actually adding a non-DT platform for,
 the EP93xx based Liebherr controller BK3.1. It's a minor variation of
 the EP93xx reference design and in active use, while EP93xx apparently
 doesn't have enough new development to have any device tree support.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJac0azAAoJEGCrR//JCVInuaAQAJBfJeqhFC01JeO+Oy/Sz3qh
 WuZpT0ExfU1EFLnyBhEYJujDmlzNPcVacI53gSazpiksHboLpOodW+pX19NwOyzC
 RSbyLa+W5MH1uXtIzV8dqwXboOWJ/Fh348VTSG4dw2JJ6i4k3U/9xboOVtnynCic
 ww66FEEpFvJfNgch+7zcpHDwACqJ8nsrortNzEM8eV2jA/DOgv48EemTJqf1Lv1E
 Z0nqIBEPvInPgCB3MX3KTD6CgbQ1qZOcWcEgR1tDRqmCuCgvp4xawiOBKos6QHaG
 Iqgi3jI5rPJ391mhIQqK5duU5IKMY0FO6qxir7U+YNZm8vMmijPMwgEmlkG28mTT
 6B7+ZNHXnSnFklpMetvCBDB8a+Lximft/oqecumowKJo0R9vZontnP4Jdbt9HLic
 T99nzw2Xwhxo/J7kQXcGDoLyRAPgS1iiHyWXKbXADRlaftACeXL9iVTg+F9EAveq
 WTDNmN6hbha4fN5PXUkcTAco96JtevT/H2ZDmYFBCSaqHy3QrNPJtDcVSIJd4CGT
 uQJwXINHvR/nJrEl2ZLLsfMSJMBXWp79w7xb+QfkIa6UXL3hUwGC9Wd2jQZsdHf3
 AQ/Q1oJ6epCvd2+4xo0EwiUMjr2MGqfLmtGBQkMzdSbFe50RhHe3w2Amy3VU03X+
 vFB4zAmReWDZXgQ7+Dhg
 =frm4
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC platform updates from Arnd Bergmann:
 "These are mostly minor bugfixes, cleanup and many defconfig updates to
  support added drivers. In particular OMAP and PXA keep cleaning up the
  legacy code base, as usual.

  Nvidia adds some more SoC support code for Tegra 186.

  For the first time on years, we are actually adding a non-DT platform
  for the EP93xx based Liebherr controller BK3.1. It's a minor variation
  of the EP93xx reference design and in active use, while EP93xx
  apparently doesn't have enough new development to have any device tree
  support"

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (73 commits)
  ARM: omap: hwmod: fix section mismatch warnings
  ARM: pxa/tosa-bt: add MODULE_LICENSE tag
  arm64: defconfig: enable CONFIG_ACPI_APEI_EINJ
  arm64: defconfig: enable EDAC GHES option
  arm64: defconfig: enable CONFIG_ACPI_APEI_MEMORY_FAILURE
  ARM: imx_v6_v7_defconfig: enable CONFIG_CPU_FREQ_STAT
  Wind down ARM/TANGO port
  ARM: davinci: constify gpio_led
  ARM: davinci: drop unneeded newline
  soc: Add SoC driver for Gemini
  ARM: SAMSUNG: Add SPDX license identifiers
  ARM: S5PV210: Add SPDX license identifiers
  ARM: S3C64XX: Add SPDX license identifiers
  ARM: S3C24XX: Add SPDX license identifiers
  ARM: EXYNOS: Add SPDX license identifiers
  ARM: imx: remove unused imx3 pm definitions
  ARM: imx: don't abort MMDC probe if power saving status doesn't match
  ARM: imx_v6_v7_defconfig: enable RTC_DRV_MXC_V2
  ARM: imx_v6_v7_defconfig: Add missing config for DART-MX6 SoM
  ARM: davinci: Use PTR_ERR_OR_ZERO()
  ...
This commit is contained in:
Linus Torvalds 2018-02-01 16:17:40 -08:00
parent 537433b624 0ca14cdea7
commit adbc128fa8
307 changed files with 1948 additions and 2990 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

74
MAINTAINERS
View File

@ -1278,6 +1278,12 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Supported
F: drivers/net/ethernet/cavium/thunder/
ARM/CIRRUS LOGIC BK3 MACHINE SUPPORT
M: Lukasz Majewski <lukma@denx.de>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
F: arch/arm/mach-ep93xx/ts72xx.c
ARM/CIRRUS LOGIC CLPS711X ARM ARCHITECTURE
M: Alexander Shiyan <shc_work@mail.ru>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
@ -1662,14 +1668,38 @@ ARM/NEC MOBILEPRO 900/c MACHINE SUPPORT
M: Michael Petchkovsky <mkpetch@internode.on.net>
S: Maintained
ARM/NOMADIK ARCHITECTURE
M: Alessandro Rubini <rubini@unipv.it>
ARM/NOMADIK/U300/Ux500 ARCHITECTURES
M: Linus Walleij <linus.walleij@linaro.org>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
F: arch/arm/mach-nomadik/
F: drivers/pinctrl/nomadik/
F: arch/arm/mach-u300/
F: arch/arm/mach-ux500/
F: arch/arm/boot/dts/ste-*
F: drivers/clk/clk-nomadik.c
F: drivers/clk/clk-u300.c
F: drivers/clocksource/clksrc-dbx500-prcmu.c
F: drivers/clocksource/timer-u300.c
F: drivers/dma/coh901318*
F: drivers/dma/ste_dma40*
F: drivers/hwspinlock/u8500_hsem.c
F: drivers/i2c/busses/i2c-nomadik.c
F: drivers/i2c/busses/i2c-stu300.c
F: drivers/mfd/ab3100*
F: drivers/mfd/ab8500*
F: drivers/mfd/abx500*
F: drivers/mfd/dbx500*
F: drivers/mfd/db8500*
F: drivers/pinctrl/nomadik/
F: drivers/pinctrl/pinctrl-coh901*
F: drivers/pinctrl/pinctrl-u300.c
F: drivers/rtc/rtc-ab3100.c
F: drivers/rtc/rtc-ab8500.c
F: drivers/rtc/rtc-coh901331.c
F: drivers/rtc/rtc-pl031.c
F: drivers/watchdog/coh901327_wdt.c
F: Documentation/devicetree/bindings/arm/ste-*
F: Documentation/devicetree/bindings/arm/ux500/
T: git git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik.git
ARM/NUVOTON W90X900 ARM ARCHITECTURE
@ -1983,9 +2013,10 @@ N: stm32
F: drivers/clocksource/armv7m_systick.c
ARM/TANGO ARCHITECTURE
M: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
M: Marc Gonzalez <marc.w.gonzalez@free.fr>
M: Mans Rullgard <mans@mansr.com>
L: linux-arm-kernel@lists.infradead.org
S: Maintained
S: Odd Fixes
N: tango
ARM/TECHNOLOGIC SYSTEMS TS7250 MACHINE SUPPORT
@ -2049,21 +2080,6 @@ M: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
M: Dirk Opfer <dirk@opfer-online.de>
S: Maintained
ARM/U300 MACHINE SUPPORT
M: Linus Walleij <linus.walleij@linaro.org>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Supported
F: arch/arm/mach-u300/
F: drivers/clocksource/timer-u300.c
F: drivers/i2c/busses/i2c-stu300.c
F: drivers/rtc/rtc-coh901331.c
F: drivers/watchdog/coh901327_wdt.c
F: drivers/dma/coh901318*
F: drivers/mfd/ab3100*
F: drivers/rtc/rtc-ab3100.c
F: drivers/rtc/rtc-coh901331.c
T: git git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson.git
ARM/UNIPHIER ARCHITECTURE
M: Masahiro Yamada <yamada.masahiro@socionext.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
@ -2085,24 +2101,6 @@ F: drivers/reset/reset-uniphier.c
F: drivers/tty/serial/8250/8250_uniphier.c
N: uniphier
ARM/Ux500 ARM ARCHITECTURE
M: Linus Walleij <linus.walleij@linaro.org>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
F: arch/arm/mach-ux500/
F: drivers/clocksource/clksrc-dbx500-prcmu.c
F: drivers/dma/ste_dma40*
F: drivers/hwspinlock/u8500_hsem.c
F: drivers/mfd/abx500*
F: drivers/mfd/ab8500*
F: drivers/mfd/dbx500*
F: drivers/mfd/db8500*
F: drivers/pinctrl/nomadik/pinctrl-ab*
F: drivers/pinctrl/nomadik/pinctrl-nomadik*
F: drivers/rtc/rtc-ab8500.c
F: drivers/rtc/rtc-pl031.c
T: git git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson.git
ARM/Ux500 CLOCK FRAMEWORK SUPPORT
M: Ulf Hansson <ulf.hansson@linaro.org>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)

1
arch/arm/configs/davinci_all_defconfig
View File

@ -94,6 +94,7 @@ CONFIG_PPP=m
CONFIG_PPP_DEFLATE=m
CONFIG_PPP_ASYNC=m
CONFIG_PPP_SYNC_TTY=m
CONFIG_USB_USBNET=m
CONFIG_INPUT_EVDEV=m
CONFIG_INPUT_EVBUG=m
CONFIG_KEYBOARD_ATKBD=m

7
arch/arm/configs/exynos_defconfig
View File

@ -3,6 +3,7 @@ CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_CGROUPS=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_PERF_EVENTS=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_PARTITION_ADVANCED=y
@ -179,6 +180,7 @@ CONFIG_REGULATOR_TPS65090=y
CONFIG_REGULATOR_WM8994=y
CONFIG_MEDIA_SUPPORT=m
CONFIG_MEDIA_CAMERA_SUPPORT=y
CONFIG_MEDIA_CEC_SUPPORT=y
CONFIG_MEDIA_CONTROLLER=y
CONFIG_VIDEO_V4L2_SUBDEV_API=y
CONFIG_MEDIA_USB_SUPPORT=y
@ -195,6 +197,8 @@ CONFIG_VIDEO_SAMSUNG_S5P_MFC=m
CONFIG_VIDEO_SAMSUNG_EXYNOS_GSC=m
CONFIG_V4L_TEST_DRIVERS=y
CONFIG_VIDEO_VIVID=m
CONFIG_CEC_PLATFORM_DRIVERS=y
CONFIG_VIDEO_SAMSUNG_S5P_CEC=m
CONFIG_DRM=y
CONFIG_DRM_EXYNOS=y
CONFIG_DRM_EXYNOS_FIMD=y
@ -207,6 +211,7 @@ CONFIG_DRM_PANEL_SAMSUNG_LD9040=y
CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0=y
CONFIG_DRM_NXP_PTN3460=y
CONFIG_DRM_PARADE_PS8622=y
CONFIG_DRM_SII9234=y
CONFIG_LCD_CLASS_DEVICE=y
CONFIG_LCD_PLATFORM=y
CONFIG_BACKLIGHT_PWM=y
@ -218,6 +223,7 @@ CONFIG_SND_SOC_SAMSUNG=y
CONFIG_SND_SOC_SAMSUNG_SMDK_WM8994=y
CONFIG_SND_SOC_SMDK_WM8994_PCM=y
CONFIG_SND_SOC_SNOW=y
CONFIG_SND_SOC_ODROID=y
CONFIG_SND_SIMPLE_CARD=y
CONFIG_USB=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
@ -281,6 +287,7 @@ CONFIG_DEVFREQ_GOV_POWERSAVE=y
CONFIG_DEVFREQ_GOV_USERSPACE=y
CONFIG_ARM_EXYNOS_BUS_DEVFREQ=y
CONFIG_DEVFREQ_EVENT_EXYNOS_NOCP=y
CONFIG_EXYNOS_IOMMU=y
CONFIG_EXTCON=y
CONFIG_EXTCON_MAX14577=y
CONFIG_EXTCON_MAX77693=y

8
arch/arm/configs/imx_v6_v7_defconfig
View File

@ -55,6 +55,7 @@ CONFIG_FORCE_MAX_ZONEORDER=14
CONFIG_CMDLINE="noinitrd console=ttymxc0,115200"
CONFIG_KEXEC=y
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_STAT=y
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
CONFIG_CPU_FREQ_GOV_USERSPACE=y
@ -80,6 +81,7 @@ CONFIG_CAN=y
CONFIG_CAN_FLEXCAN=y
CONFIG_BT=y
CONFIG_BT_HCIUART=y
CONFIG_BT_HCIUART_SERDEV=y
CONFIG_BT_HCIUART_H4=y
CONFIG_BT_HCIUART_LL=y
CONFIG_CFG80211=y
@ -155,6 +157,7 @@ CONFIG_USB_USBNET=y
CONFIG_USB_NET_CDC_EEM=m
CONFIG_BRCMFMAC=m
CONFIG_WL12XX=m
CONFIG_WL18XX=m
CONFIG_WLCORE_SDIO=m
# CONFIG_WILINK_PLATFORM_DATA is not set
CONFIG_INPUT_EVDEV=y
@ -185,6 +188,8 @@ CONFIG_SERIAL_IMX=y
CONFIG_SERIAL_IMX_CONSOLE=y
CONFIG_SERIAL_FSL_LPUART=y
CONFIG_SERIAL_FSL_LPUART_CONSOLE=y
CONFIG_SERIAL_DEV_BUS=y
CONFIG_SERIAL_DEV_CTRL_TTYPORT=y
# CONFIG_I2C_COMPAT is not set
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_MUX=y
@ -248,6 +253,7 @@ CONFIG_VIDEO_OV5640=m
CONFIG_SOC_CAMERA_OV2640=y
CONFIG_IMX_IPUV3_CORE=y
CONFIG_DRM=y
CONFIG_DRM_PANEL_LVDS=y
CONFIG_DRM_PANEL_SIMPLE=y
CONFIG_DRM_DW_HDMI_AHB_AUDIO=m
CONFIG_DRM_DW_HDMI_CEC=y
@ -340,6 +346,7 @@ CONFIG_LEDS_TRIGGER_ONESHOT=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_LEDS_TRIGGER_BACKLIGHT=y
CONFIG_LEDS_TRIGGER_GPIO=y
CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_INTF_DEV_UIE_EMUL=y
CONFIG_RTC_DRV_DS1307=y
@ -349,6 +356,7 @@ CONFIG_RTC_DRV_PCF8563=y
CONFIG_RTC_DRV_M41T80=y
CONFIG_RTC_DRV_MC13XXX=y
CONFIG_RTC_DRV_MXC=y
CONFIG_RTC_DRV_MXC_V2=y
CONFIG_RTC_DRV_SNVS=y
CONFIG_DMADEVICES=y
CONFIG_FSL_EDMA=y

7
arch/arm/configs/keystone_defconfig
View File

@ -228,3 +228,10 @@ CONFIG_CRYPTO_DES=y
CONFIG_CRYPTO_ANSI_CPRNG=y
CONFIG_CRYPTO_USER_API_HASH=y
CONFIG_CRYPTO_USER_API_SKCIPHER=y
CONFIG_SPI_CADENCE_QUADSPI=y
CONFIG_INPUT_MISC=y
CONFIG_INPUT_EVDEV=m
CONFIG_INPUT_GPIO_DECODER=m
CONFIG_GPIO_PCA953X=m
CONFIG_LEDS_TRIGGER_ACTIVITY=y
CONFIG_LEDS_TRIGGER_CPU=y

12
arch/arm/configs/multi_v7_defconfig
View File

@ -115,6 +115,8 @@ CONFIG_ARCH_ZYNQ=y
CONFIG_TRUSTED_FOUNDATIONS=y
CONFIG_PCI=y
CONFIG_PCI_HOST_GENERIC=y
CONFIG_PCI_DRA7XX=y
CONFIG_PCI_DRA7XX_EP=y
CONFIG_PCI_KEYSTONE=y
CONFIG_PCI_MSI=y
CONFIG_PCI_MVEBU=y
@ -122,6 +124,9 @@ CONFIG_PCI_TEGRA=y
CONFIG_PCI_RCAR_GEN2=y
CONFIG_PCIE_RCAR=y
CONFIG_PCIEPORTBUS=y
CONFIG_PCI_ENDPOINT=y
CONFIG_PCI_ENDPOINT_CONFIGFS=y
CONFIG_PCI_EPF_TEST=m
CONFIG_SMP=y
CONFIG_NR_CPUS=16
CONFIG_HIGHPTE=y
@ -221,6 +226,7 @@ CONFIG_ATMEL_SSC=m
CONFIG_QCOM_COINCELL=m
CONFIG_APDS9802ALS=y
CONFIG_ISL29003=y
CONFIG_PCI_ENDPOINT_TEST=m
CONFIG_EEPROM_AT24=y
CONFIG_BLK_DEV_SD=y
CONFIG_BLK_DEV_SR=y
@ -556,6 +562,7 @@ CONFIG_REGULATOR_VEXPRESS=y
CONFIG_REGULATOR_WM8994=m
CONFIG_MEDIA_SUPPORT=m
CONFIG_MEDIA_CAMERA_SUPPORT=y
CONFIG_MEDIA_CEC_SUPPORT=y
CONFIG_MEDIA_CONTROLLER=y
CONFIG_VIDEO_V4L2_SUBDEV_API=y
CONFIG_MEDIA_USB_SUPPORT=y
@ -581,6 +588,8 @@ CONFIG_VIDEO_STI_DELTA=m
CONFIG_VIDEO_RENESAS_JPU=m
CONFIG_VIDEO_RENESAS_VSP1=m
CONFIG_V4L_TEST_DRIVERS=y
CONFIG_CEC_PLATFORM_DRIVERS=y
CONFIG_VIDEO_SAMSUNG_S5P_CEC=m
# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
CONFIG_VIDEO_ADV7180=m
CONFIG_VIDEO_ML86V7667=m
@ -612,6 +621,7 @@ CONFIG_DRM_TEGRA=y
CONFIG_DRM_PANEL_SAMSUNG_LD9040=m
CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0=m
CONFIG_DRM_PANEL_SIMPLE=y
CONFIG_DRM_SII9234=m
CONFIG_DRM_STI=m
CONFIG_DRM_VC4=y
CONFIG_FB_ARMCLCD=y
@ -650,6 +660,7 @@ CONFIG_SND_SOC_SAMSUNG=m
CONFIG_SND_SOC_SAMSUNG_SMDK_WM8994=m
CONFIG_SND_SOC_SMDK_WM8994_PCM=m
CONFIG_SND_SOC_SNOW=m
CONFIG_SND_SOC_ODROID=m
CONFIG_SND_SOC_SH4_FSI=m
CONFIG_SND_SOC_RCAR=m
CONFIG_SND_SIMPLE_SCU_CARD=m
@ -878,6 +889,7 @@ CONFIG_PWM_ATMEL=m
CONFIG_PWM_ATMEL_HLCDC_PWM=m
CONFIG_PWM_ATMEL_TCB=m
CONFIG_PWM_FSL_FTM=m
CONFIG_PWM_RCAR=m
CONFIG_PWM_RENESAS_TPU=y
CONFIG_PWM_ROCKCHIP=m
CONFIG_PWM_SAMSUNG=m

19
arch/arm/configs/omap2plus_defconfig
View File

@ -48,6 +48,13 @@ CONFIG_SOC_AM43XX=y
CONFIG_SOC_DRA7XX=y
CONFIG_ARM_THUMBEE=y
CONFIG_ARM_ERRATA_411920=y
CONFIG_PCI=y
CONFIG_PCI_MSI=y
CONFIG_PCI_DRA7XX=y
CONFIG_PCI_DRA7XX_EP=y
CONFIG_PCI_ENDPOINT=y
CONFIG_PCI_ENDPOINT_CONFIGFS=y
CONFIG_PCI_EPF_TEST=m
CONFIG_SMP=y
CONFIG_NR_CPUS=2
CONFIG_CMA=y
@ -137,6 +144,7 @@ CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=16384
CONFIG_SENSORS_TSL2550=m
CONFIG_SRAM=y
CONFIG_PCI_ENDPOINT_TEST=m
CONFIG_EEPROM_AT24=m
CONFIG_BLK_DEV_SD=y
CONFIG_SCSI_SCAN_ASYNC=y
@ -468,6 +476,7 @@ CONFIG_PWM_TIECAP=m
CONFIG_PWM_TIEHRPWM=m
CONFIG_PWM_TWL=m
CONFIG_PWM_TWL_LED=m
CONFIG_PHY_CPCAP_USB=m
CONFIG_PHY_DM816X_USB=m
CONFIG_OMAP_USB2=m
CONFIG_TI_PIPE3=y
@ -516,3 +525,13 @@ CONFIG_LIBCRC32C=y
CONFIG_FONTS=y
CONFIG_FONT_8x8=y
CONFIG_FONT_8x16=y
CONFIG_KERNEL_MODE_NEON=y
CONFIG_ARM_CRYPTO=y
CONFIG_CRYPTO_SHA1_ARM=m
CONFIG_CRYPTO_SHA1_ARM_NEON=m
CONFIG_CRYPTO_SHA256_ARM=m
CONFIG_CRYPTO_SHA512_ARM=m
CONFIG_CRYPTO_AES_ARM=m
CONFIG_CRYPTO_AES_ARM_BS=m
CONFIG_CRYPTO_CHACHA20_NEON=m
CONFIG_CRYPTO_GHASH_ARM_CE=m

3
arch/arm/configs/qcom_defconfig
View File

@ -136,7 +136,9 @@ CONFIG_REGULATOR_QCOM_RPM=y
CONFIG_REGULATOR_QCOM_SMD_RPM=y
CONFIG_REGULATOR_QCOM_SPMI=y
CONFIG_MEDIA_SUPPORT=y
CONFIG_DRM=y
CONFIG_FB=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_BACKLIGHT_LCD_SUPPORT=y
# CONFIG_LCD_CLASS_DEVICE is not set
CONFIG_BACKLIGHT_CLASS_DEVICE=y
@ -200,6 +202,7 @@ CONFIG_MSM_LCC_8960=y
CONFIG_MDM_LCC_9615=y
CONFIG_MSM_MMCC_8960=y
CONFIG_MSM_MMCC_8974=y
CONFIG_MSM_IOMMU=y
CONFIG_HWSPINLOCK=y
CONFIG_HWSPINLOCK_QCOM=y
CONFIG_REMOTEPROC=y

2
arch/arm/configs/shmobile_defconfig
View File

@ -173,6 +173,7 @@ CONFIG_SND_SOC=y
CONFIG_SND_SOC_SH4_FSI=y
CONFIG_SND_SOC_RCAR=y
CONFIG_SND_SOC_AK4642=y
CONFIG_SND_SOC_SGTL5000=y
CONFIG_SND_SOC_WM8978=y
CONFIG_SND_SIMPLE_SCU_CARD=y
CONFIG_USB=y
@ -207,6 +208,7 @@ CONFIG_STAGING_BOARD=y
CONFIG_IIO=y
CONFIG_AK8975=y
CONFIG_PWM=y
CONFIG_PWM_RCAR=y
CONFIG_PWM_RENESAS_TPU=y
CONFIG_GENERIC_PHY=y
CONFIG_PHY_RCAR_GEN2=y

4
arch/arm/mach-davinci/board-da850-evm.c
View File

@ -798,11 +798,11 @@ static int da850_lcd_hw_init(void)
{
int status;
status = gpio_request(DA850_LCD_BL_PIN, "lcd bl\n");
status = gpio_request(DA850_LCD_BL_PIN, "lcd bl");
if (status < 0)
return status;
status = gpio_request(DA850_LCD_PWR_PIN, "lcd pwr\n");
status = gpio_request(DA850_LCD_PWR_PIN, "lcd pwr");
if (status < 0) {
gpio_free(DA850_LCD_BL_PIN);
return status;

2
arch/arm/mach-davinci/board-neuros-osd2.c
View File

@ -128,7 +128,7 @@ static struct platform_device davinci_fb_device = {
.num_resources = 0,
};
static struct gpio_led ntosd2_leds[] = {
static const struct gpio_led ntosd2_leds[] = {
{ .name = "led1_green", .gpio = GPIO(10), },
{ .name = "led1_red", .gpio = GPIO(11), },
{ .name = "led2_green", .gpio = GPIO(12), },

2
arch/arm/mach-davinci/common.c
View File

@ -77,7 +77,7 @@ static int __init davinci_init_id(struct davinci_soc_info *soc_info)
return -EINVAL;
}
void __init davinci_common_init(struct davinci_soc_info *soc_info)
void __init davinci_common_init(const struct davinci_soc_info *soc_info)
{
int ret;

2
arch/arm/mach-davinci/da830.c
View File

@ -1194,7 +1194,7 @@ static struct davinci_timer_info da830_timer_info = {
.clocksource_id = T0_BOT,
};
static struct davinci_soc_info davinci_soc_info_da830 = {
static const struct davinci_soc_info davinci_soc_info_da830 = {
.io_desc = da830_io_desc,
.io_desc_num = ARRAY_SIZE(da830_io_desc),
.jtag_id_reg = DA8XX_SYSCFG0_BASE + DA8XX_JTAG_ID_REG,

2
arch/arm/mach-davinci/da850.c
View File

@ -1347,7 +1347,7 @@ int __init da850_register_gpio(void)
return da8xx_register_gpio(&da850_gpio_platform_data);
}
static struct davinci_soc_info davinci_soc_info_da850 = {
static const struct davinci_soc_info davinci_soc_info_da850 = {
.io_desc = da850_io_desc,
.io_desc_num = ARRAY_SIZE(da850_io_desc),
.jtag_id_reg = DA8XX_SYSCFG0_BASE + DA8XX_JTAG_ID_REG,

4
arch/arm/mach-davinci/devices-da8xx.c
View File

@ -252,7 +252,7 @@ int __init da830_register_edma(struct edma_rsv_info *rsv)
da8xx_edma0_pdata.slavecnt = ARRAY_SIZE(da830_edma_map);
edma_pdev = platform_device_register_full(&da8xx_edma0_device);
return IS_ERR(edma_pdev) ? PTR_ERR(edma_pdev) : 0;
return PTR_ERR_OR_ZERO(edma_pdev);
}
static const struct dma_slave_map da850_edma0_map[] = {
@ -297,7 +297,7 @@ int __init da850_register_edma(struct edma_rsv_info *rsv[2])
da850_edma1_pdata.slavecnt = ARRAY_SIZE(da850_edma1_map);
edma_pdev = platform_device_register_full(&da850_edma1_device);
return IS_ERR(edma_pdev) ? PTR_ERR(edma_pdev) : 0;
return PTR_ERR_OR_ZERO(edma_pdev);
}
static struct resource da8xx_i2c_resources0[] = {

2
arch/arm/mach-davinci/dm355.c
View File

@ -1006,7 +1006,7 @@ struct platform_device dm355_serial_device[] = {
}
};
static struct davinci_soc_info davinci_soc_info_dm355 = {
static const struct davinci_soc_info davinci_soc_info_dm355 = {
.io_desc = dm355_io_desc,
.io_desc_num = ARRAY_SIZE(dm355_io_desc),
.jtag_id_reg = 0x01c40028,

2
arch/arm/mach-davinci/dm365.c
View File

@ -1110,7 +1110,7 @@ struct platform_device dm365_serial_device[] = {
}
};
static struct davinci_soc_info davinci_soc_info_dm365 = {
static const struct davinci_soc_info davinci_soc_info_dm365 = {
.io_desc = dm365_io_desc,
.io_desc_num = ARRAY_SIZE(dm365_io_desc),
.jtag_id_reg = 0x01c40028,

2
arch/arm/mach-davinci/dm644x.c
View File

@ -899,7 +899,7 @@ struct platform_device dm644x_serial_device[] = {
}
};
static struct davinci_soc_info davinci_soc_info_dm644x = {
static const struct davinci_soc_info davinci_soc_info_dm644x = {
.io_desc = dm644x_io_desc,
.io_desc_num = ARRAY_SIZE(dm644x_io_desc),
.jtag_id_reg = 0x01c40028,

4
arch/arm/mach-davinci/dm646x.c
View File

@ -882,7 +882,7 @@ struct platform_device dm646x_serial_device[] = {
}
};
static struct davinci_soc_info davinci_soc_info_dm646x = {
static const struct davinci_soc_info davinci_soc_info_dm646x = {
.io_desc = dm646x_io_desc,
.io_desc_num = ARRAY_SIZE(dm646x_io_desc),
.jtag_id_reg = 0x01c40028,
@ -949,7 +949,7 @@ int __init dm646x_init_edma(struct edma_rsv_info *rsv)
dm646x_edma_pdata.rsv = rsv;
edma_pdev = platform_device_register_full(&dm646x_edma_device);
return IS_ERR(edma_pdev) ? PTR_ERR(edma_pdev) : 0;
return PTR_ERR_OR_ZERO(edma_pdev);
}
void __init dm646x_init(void)

2
arch/arm/mach-davinci/include/mach/common.h
View File

@ -79,7 +79,7 @@ struct davinci_soc_info {
extern struct davinci_soc_info davinci_soc_info;
extern void davinci_common_init(struct davinci_soc_info *soc_info);
extern void davinci_common_init(const struct davinci_soc_info *soc_info);
extern void davinci_init_ide(void);
void davinci_restart(enum reboot_mode mode, const char *cmd);
void davinci_init_late(void);

7
arch/arm/mach-ep93xx/Kconfig
View File

@ -21,6 +21,13 @@ config MACH_ADSSPHERE
Say 'Y' here if you want your kernel to support the ADS
Sphere board.
config MACH_BK3
bool "Support Liebherr BK3.1"
select MACH_TS72XX
help
Say 'Y' here if you want your kernel to support the
Liebherr controller BK3.1.
config MACH_EDB93XX
bool

165
arch/arm/mach-ep93xx/ts72xx.c
View File

@ -19,10 +19,15 @@
#include <linux/mtd/rawnand.h>
#include <linux/mtd/partitions.h>
#include <linux/spi/spi.h>
#include <linux/spi/flash.h>
#include <linux/spi/mmc_spi.h>
#include <linux/mmc/host.h>
#include <linux/platform_data/spi-ep93xx.h>
#include <mach/gpio-ep93xx.h>
#include <mach/hardware.h>
#include <mach/irqs.h>
#include <mach/gpio-ep93xx.h>
#include <asm/mach-types.h>
#include <asm/mach/map.h>
@ -31,6 +36,9 @@
#include "soc.h"
#include "ts72xx.h"
/*************************************************************************
* IO map
*************************************************************************/
static struct map_desc ts72xx_io_desc[] __initdata = {
{
.virtual = (unsigned long)TS72XX_MODEL_VIRT_BASE,
@ -47,6 +55,11 @@ static struct map_desc ts72xx_io_desc[] __initdata = {
.pfn = __phys_to_pfn(TS72XX_OPTIONS2_PHYS_BASE),
.length = TS72XX_OPTIONS2_SIZE,
.type = MT_DEVICE,
}, {
.virtual = (unsigned long)TS72XX_CPLDVER_VIRT_BASE,
.pfn = __phys_to_pfn(TS72XX_CPLDVER_PHYS_BASE),
.length = TS72XX_CPLDVER_SIZE,
.type = MT_DEVICE,
}
};
@ -123,8 +136,6 @@ static struct platform_nand_data ts72xx_nand_data = {
.nr_chips = 1,
.chip_offset = 0,
.chip_delay = 15,
.partitions = ts72xx_nand_parts,
.nr_partitions = ARRAY_SIZE(ts72xx_nand_parts),
},
.ctrl = {
.cmd_ctrl = ts72xx_nand_hwcontrol,
@ -148,8 +159,8 @@ static struct platform_device ts72xx_nand_flash = {
.num_resources = ARRAY_SIZE(ts72xx_nand_resource),
};
static void __init ts72xx_register_flash(void)
void __init ts72xx_register_flash(struct mtd_partition *parts, int n,
resource_size_t start)
{
/*
* TS7200 has NOR flash all other TS72xx board have NAND flash.
@ -157,16 +168,12 @@ static void __init ts72xx_register_flash(void)
if (board_is_ts7200()) {
ep93xx_register_flash(2, EP93XX_CS6_PHYS_BASE, SZ_16M);
} else {
resource_size_t start;
if (is_ts9420_installed())
start = EP93XX_CS7_PHYS_BASE;
else
start = EP93XX_CS6_PHYS_BASE;
ts72xx_nand_resource[0].start = start;
ts72xx_nand_resource[0].end = start + SZ_16M - 1;
ts72xx_nand_data.chip.partitions = parts;
ts72xx_nand_data.chip.nr_partitions = n;
platform_device_register(&ts72xx_nand_flash);
}
}
@ -207,10 +214,79 @@ static struct platform_device ts72xx_wdt_device = {
.num_resources = ARRAY_SIZE(ts72xx_wdt_resources),
};
/*************************************************************************
* ETH
*************************************************************************/
static struct ep93xx_eth_data __initdata ts72xx_eth_data = {
.phy_id = 1,
};
/*************************************************************************
* SPI SD/MMC host
*************************************************************************/
#define BK3_EN_SDCARD_PHYS_BASE 0x12400000
#define BK3_EN_SDCARD_PWR 0x0
#define BK3_DIS_SDCARD_PWR 0x0C
static void bk3_mmc_spi_setpower(struct device *dev, unsigned int vdd)
{
void __iomem *pwr_sd = ioremap(BK3_EN_SDCARD_PHYS_BASE, SZ_4K);
if (!pwr_sd) {
pr_err("Failed to enable SD card power!");
return;
}
pr_debug("%s: SD card pwr %s VDD:0x%x\n", __func__,
!!vdd ? "ON" : "OFF", vdd);
if (!!vdd)
__raw_writeb(BK3_EN_SDCARD_PWR, pwr_sd);
else
__raw_writeb(BK3_DIS_SDCARD_PWR, pwr_sd);
iounmap(pwr_sd);
}
static struct mmc_spi_platform_data bk3_spi_mmc_data = {
.detect_delay = 500,
.powerup_msecs = 100,
.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
.caps = MMC_CAP_NONREMOVABLE,
.setpower = bk3_mmc_spi_setpower,
};
/*************************************************************************
* SPI Bus - SD card access
*************************************************************************/
static struct spi_board_info bk3_spi_board_info[] __initdata = {
{
.modalias = "mmc_spi",
.platform_data = &bk3_spi_mmc_data,
.max_speed_hz = 7.4E6,
.bus_num = 0,
.chip_select = 0,
.mode = SPI_MODE_0,
},
};
/*
* This is a stub -> the FGPIO[3] pin is not connected on the schematic
* The all work is performed automatically by !SPI_FRAME (SFRM1) and
* goes through CPLD
*/
static int bk3_spi_chipselects[] __initdata = {
EP93XX_GPIO_LINE_F(3),
};
static struct ep93xx_spi_info bk3_spi_master __initdata = {
.chipselect = bk3_spi_chipselects,
.num_chipselect = ARRAY_SIZE(bk3_spi_chipselects),
.use_dma = 1,
};
/*************************************************************************
* TS72XX support code
*************************************************************************/
#if IS_ENABLED(CONFIG_FPGA_MGR_TS73XX)
/* Relative to EP93XX_CS1_PHYS_BASE */
@ -257,7 +333,9 @@ static struct ep93xx_spi_info ts72xx_spi_info __initdata = {
static void __init ts72xx_init_machine(void)
{
ep93xx_init_devices();
ts72xx_register_flash();
ts72xx_register_flash(ts72xx_nand_parts, ARRAY_SIZE(ts72xx_nand_parts),
is_ts9420_installed() ?
EP93XX_CS7_PHYS_BASE : EP93XX_CS6_PHYS_BASE);
platform_device_register(&ts72xx_rtc_device);
platform_device_register(&ts72xx_wdt_device);
@ -280,3 +358,66 @@ MACHINE_START(TS72XX, "Technologic Systems TS-72xx SBC")
.init_late = ep93xx_init_late,
.restart = ep93xx_restart,
MACHINE_END
/*************************************************************************
* EP93xx I2S audio peripheral handling
*************************************************************************/
static struct resource ep93xx_i2s_resource[] = {
DEFINE_RES_MEM(EP93XX_I2S_PHYS_BASE, 0x100),
DEFINE_RES_IRQ_NAMED(IRQ_EP93XX_SAI, "spilink i2s slave"),
};
static struct platform_device ep93xx_i2s_device = {
.name = "ep93xx-spilink-i2s",
.id = -1,
.num_resources = ARRAY_SIZE(ep93xx_i2s_resource),
.resource = ep93xx_i2s_resource,
};
/*************************************************************************
* BK3 support code
*************************************************************************/
static struct mtd_partition bk3_nand_parts[] = {
{
.name = "System",
.offset = 0x00000000,
.size = 0x01e00000,
}, {
.name = "Data",
.offset = 0x01e00000,
.size = 0x05f20000
}, {
.name = "RedBoot",
.offset = 0x07d20000,
.size = 0x002e0000,
.mask_flags = MTD_WRITEABLE, /* force RO */
},
};
static void __init bk3_init_machine(void)
{
ep93xx_init_devices();
ts72xx_register_flash(bk3_nand_parts, ARRAY_SIZE(bk3_nand_parts),
EP93XX_CS6_PHYS_BASE);
ep93xx_register_eth(&ts72xx_eth_data, 1);
ep93xx_register_spi(&bk3_spi_master, bk3_spi_board_info,
ARRAY_SIZE(bk3_spi_board_info));
/* Configure ep93xx's I2S to use AC97 pins */
ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_I2SONAC97);
platform_device_register(&ep93xx_i2s_device);
}
MACHINE_START(BK3, "Liebherr controller BK3.1")
/* Maintainer: Lukasz Majewski <lukma@denx.de> */
.atag_offset = 0x100,
.map_io = ts72xx_map_io,
.init_irq = ep93xx_init_irq,
.init_time = ep93xx_timer_init,
.init_machine = bk3_init_machine,
.init_late = ep93xx_init_late,
.restart = ep93xx_restart,
MACHINE_END

9
arch/arm/mach-ep93xx/ts72xx.h
View File

@ -10,8 +10,12 @@
* febff000 22000000 4K model number register (bits 0-2)
* febfe000 22400000 4K options register
* febfd000 22800000 4K options register #2
* febfc000 23400000 4K CPLD version register
*/
#ifndef __TS72XX_H_
#define __TS72XX_H_
#define TS72XX_MODEL_PHYS_BASE 0x22000000
#define TS72XX_MODEL_VIRT_BASE IOMEM(0xfebff000)
#define TS72XX_MODEL_SIZE 0x00001000
@ -39,6 +43,10 @@
#define TS72XX_OPTIONS2_TS9420 0x04
#define TS72XX_OPTIONS2_TS9420_BOOT 0x02
#define TS72XX_CPLDVER_PHYS_BASE 0x23400000
#define TS72XX_CPLDVER_VIRT_BASE IOMEM(0xfebfc000)
#define TS72XX_CPLDVER_SIZE 0x00001000
#ifndef __ASSEMBLY__
static inline int ts72xx_model(void)
@ -83,3 +91,4 @@ static inline int is_ts9420_installed(void)
TS72XX_OPTIONS2_TS9420);
}
#endif
#endif /* __TS72XX_H_ */

4
arch/arm/mach-exynos/Kconfig
View File

@ -1,9 +1,7 @@
# arch/arm/mach-exynos/Kconfig
# SPDX-License-Identifier: GPL-2.0
#
# Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
# http://www.samsung.com/
#
# Licensed under GPLv2
# Configuration options for the EXYNOS

4
arch/arm/mach-exynos/Makefile
View File

@ -1,9 +1,7 @@
# arch/arm/mach-exynos/Makefile
# SPDX-License-Identifier: GPL-2.0
#
# Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
# http://www.samsung.com/
#
# Licensed under GPLv2
ccflags-$(CONFIG_ARCH_MULTIPLATFORM) += -I$(srctree)/$(src)/include -I$(srctree)/arch/arm/plat-samsung/include

5
arch/arm/mach-exynos/common.h
View File

@ -1,12 +1,9 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (c) 2011 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* Common Header for EXYNOS machines
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ARCH_ARM_MACH_EXYNOS_COMMON_H

5
arch/arm/mach-exynos/exynos-smc.S
View File

@ -1,11 +1,8 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2012 Samsung Electronics.
*
* Copied from omap-smc.S Copyright (C) 2010 Texas Instruments, Inc.
*
* This program is free software,you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/linkage.h>

16
arch/arm/mach-exynos/exynos.c
View File

@ -1,13 +1,9 @@
/*
* SAMSUNG EXYNOS Flattened Device Tree enabled machine
*
* Copyright (c) 2010-2014 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
// SPDX-License-Identifier: GPL-2.0
//
// SAMSUNG EXYNOS Flattened Device Tree enabled machine
//
// Copyright (c) 2010-2014 Samsung Electronics Co., Ltd.
// http://www.samsung.com
#include <linux/init.h>
#include <linux/io.h>

14
arch/arm/mach-exynos/firmware.c
View File

@ -1,12 +1,8 @@
/*
* Copyright (C) 2012 Samsung Electronics.
* Kyungmin Park <kyungmin.park@samsung.com>
* Tomasz Figa <t.figa@samsung.com>
*
* This program is free software,you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
// SPDX-License-Identifier: GPL-2.0
//
// Copyright (C) 2012 Samsung Electronics.
// Kyungmin Park <kyungmin.park@samsung.com>
// Tomasz Figa <t.figa@samsung.com>
#include <linux/kernel.h>
#include <linux/io.h>

6
arch/arm/mach-exynos/headsmp.S
View File

@ -1,13 +1,9 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
*
* Cloned from linux/arch/arm/mach-realview/headsmp.S
*
* Copyright (c) 2003 ARM Limited
* All Rights Reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/linkage.h>
#include <linux/init.h>

7
arch/arm/mach-exynos/include/mach/map.h
View File

@ -1,13 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
* http://www.samsung.com/
*
* EXYNOS - Memory map definitions
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
*/
#ifndef __ASM_ARCH_MAP_H
#define __ASM_ARCH_MAP_H __FILE__

17
arch/arm/mach-exynos/mcpm-exynos.c
View File

@ -1,15 +1,8 @@
/*
* Copyright (c) 2014 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* arch/arm/mach-exynos/mcpm-exynos.c
*
* Based on arch/arm/mach-vexpress/dcscb.c
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
// SPDX-License-Identifier: GPL-2.0
// Copyright (c) 2014 Samsung Electronics Co., Ltd.
// http://www.samsung.com
//
// Based on arch/arm/mach-vexpress/dcscb.c
#include <linux/arm-cci.h>
#include <linux/delay.h>

21
arch/arm/mach-exynos/platsmp.c
View File

@ -1,16 +1,11 @@
/*
* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* Cloned from linux/arch/arm/mach-vexpress/platsmp.c
*
* Copyright (C) 2002 ARM Ltd.
* All Rights Reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
// SPDX-License-Identifier: GPL-2.0
// Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
// http://www.samsung.com
//
// Cloned from linux/arch/arm/mach-vexpress/platsmp.c
//
// Copyright (C) 2002 ARM Ltd.
// All Rights Reserved
#include <linux/init.h>
#include <linux/errno.h>

24
arch/arm/mach-exynos/pm.c
View File

@ -1,17 +1,13 @@
/*
* Copyright (c) 2011-2014 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* EXYNOS - Power Management support
*
* Based on arch/arm/mach-s3c2410/pm.c
* Copyright (c) 2006 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
// SPDX-License-Identifier: GPL-2.0
//
// Copyright (c) 2011-2014 Samsung Electronics Co., Ltd.
// http://www.samsung.com
//
// EXYNOS - Power Management support
//
// Based on arch/arm/mach-s3c2410/pm.c
// Copyright (c) 2006 Simtec Electronics
// Ben Dooks <ben@simtec.co.uk>
#include <linux/init.h>
#include <linux/suspend.h>

11
arch/arm/mach-exynos/sleep.S
View File

@ -1,18 +1,9 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (c) 2013 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* Exynos low-level resume code
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/linkage.h>

5
arch/arm/mach-exynos/smc.h
View File

@ -1,11 +1,8 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (c) 2012 Samsung Electronics.
*
* EXYNOS - SMC Call
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_ARCH_EXYNOS_SMC_H

24
arch/arm/mach-exynos/suspend.c
View File

@ -1,17 +1,13 @@
/*
* Copyright (c) 2011-2014 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* EXYNOS - Suspend support
*
* Based on arch/arm/mach-s3c2410/pm.c
* Copyright (c) 2006 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
// SPDX-License-Identifier: GPL-2.0
//
// Copyright (c) 2011-2014 Samsung Electronics Co., Ltd.
// http://www.samsung.com
//
// EXYNOS - Suspend support
//
// Based on arch/arm/mach-s3c2410/pm.c
// Copyright (c) 2006 Simtec Electronics
// Ben Dooks <ben@simtec.co.uk>
#include <linux/init.h>
#include <linux/suspend.h>

9
arch/arm/mach-imx/common.h
View File

@ -71,15 +71,6 @@ enum mxc_cpu_pwr_mode {
STOP_POWER_OFF, /* STOP + SRPG */
};
enum mx3_cpu_pwr_mode {
MX3_RUN,
MX3_WAIT,
MX3_DOZE,
MX3_SLEEP,
};
void mx3_cpu_lp_set(enum mx3_cpu_pwr_mode mode);
void imx_enable_cpu(int cpu, bool enable);
void imx_set_cpu_jump(int cpu, void *jump_addr);
u32 imx_get_cpu_arg(int cpu);

11
arch/arm/mach-imx/mmdc.c
View File

@ -547,7 +547,6 @@ static int imx_mmdc_probe(struct platform_device *pdev)
struct device_node *np = pdev->dev.of_node;
void __iomem *mmdc_base, *reg;
u32 val;
int timeout = 0x400;
mmdc_base = of_iomap(np, 0);
WARN_ON(!mmdc_base);
@ -565,16 +564,6 @@ static int imx_mmdc_probe(struct platform_device *pdev)
val &= ~(1 << BP_MMDC_MAPSR_PSD);
writel_relaxed(val, reg);
/* Ensure it's successfully enabled */
while (!(readl_relaxed(reg) & 1 << BP_MMDC_MAPSR_PSS) && --timeout)
cpu_relax();
if (unlikely(!timeout)) {
pr_warn("%s: failed to enable automatic power saving\n",
__func__);
return -EBUSY;
}
return imx_mmdc_perf_init(pdev, mmdc_base);
}

2
arch/arm/mach-mediatek/Kconfig
View File

@ -1,5 +1,5 @@
menuconfig ARCH_MEDIATEK
bool "Mediatek MT65xx & MT81xx SoC"
bool "MediaTek SoC Support"
depends on ARCH_MULTI_V7
select ARM_GIC
select PINCTRL

2
arch/arm/mach-mmp/mmp2.h
View File

@ -10,7 +10,7 @@ extern void __init mmp2_init_irq(void);
extern void mmp2_clear_pmic_int(void);
#include <linux/i2c.h>
#include <linux/i2c/pxa-i2c.h>
#include <linux/platform_data/i2c-pxa.h>
#include <linux/platform_data/dma-mmp_tdma.h>
#include "devices.h"

2
arch/arm/mach-mmp/pxa168.h
View File

@ -11,7 +11,7 @@ extern void pxa168_restart(enum reboot_mode, const char *);
extern void pxa168_clear_keypad_wakeup(void);
#include <linux/i2c.h>
#include <linux/i2c/pxa-i2c.h>
#include <linux/platform_data/i2c-pxa.h>
#include <linux/platform_data/mtd-nand-pxa3xx.h>
#include <video/pxa168fb.h>
#include <linux/platform_data/keypad-pxa27x.h>

2
arch/arm/mach-mmp/pxa910.h
View File

@ -7,7 +7,7 @@ extern void __init icu_init_irq(void);
extern void __init pxa910_init_irq(void);
#include <linux/i2c.h>
#include <linux/i2c/pxa-i2c.h>
#include <linux/platform_data/i2c-pxa.h>
#include <linux/platform_data/mtd-nand-pxa3xx.h>
#include <video/mmp_disp.h>

81
arch/arm/mach-omap2/cm-regbits-24xx.h
View File

@ -14,38 +14,8 @@
* published by the Free Software Foundation.
*/
#define OMAP24XX_EN_CAM_SHIFT 31
#define OMAP24XX_EN_WDT4_SHIFT 29
#define OMAP2420_EN_WDT3_SHIFT 28
#define OMAP24XX_EN_MSPRO_SHIFT 27
#define OMAP24XX_EN_FAC_SHIFT 25
#define OMAP2420_EN_EAC_SHIFT 24
#define OMAP24XX_EN_HDQ_SHIFT 23
#define OMAP2420_EN_I2C2_SHIFT 20
#define OMAP2420_EN_I2C1_SHIFT 19
#define OMAP2430_EN_MCBSP5_SHIFT 5
#define OMAP2430_EN_MCBSP4_SHIFT 4
#define OMAP2430_EN_MCBSP3_SHIFT 3
#define OMAP24XX_EN_SSI_SHIFT 1
#define OMAP24XX_EN_MPU_WDT_SHIFT 3
#define OMAP24XX_CLKSEL_MPU_SHIFT 0
#define OMAP24XX_CLKSEL_MPU_WIDTH 5
#define OMAP24XX_AUTOSTATE_MPU_MASK (1 << 0)
#define OMAP24XX_EN_TV_SHIFT 2
#define OMAP24XX_EN_DSS2_SHIFT 1
#define OMAP24XX_EN_DSS1_SHIFT 0
#define OMAP24XX_EN_DSS1_MASK (1 << 0)
#define OMAP2430_EN_I2CHS2_SHIFT 20
#define OMAP2430_EN_I2CHS1_SHIFT 19
#define OMAP2430_EN_MMCHSDB2_SHIFT 17
#define OMAP2430_EN_MMCHSDB1_SHIFT 16
#define OMAP24XX_EN_MAILBOXES_SHIFT 30
#define OMAP2430_EN_SDRC_SHIFT 2
#define OMAP24XX_EN_PKA_SHIFT 4
#define OMAP24XX_EN_AES_SHIFT 3
#define OMAP24XX_EN_RNG_SHIFT 2
#define OMAP24XX_EN_SHA_SHIFT 1
#define OMAP24XX_EN_DES_SHIFT 0
#define OMAP24XX_ST_MAILBOXES_SHIFT 30
#define OMAP24XX_ST_HDQ_SHIFT 23
#define OMAP2420_ST_I2C2_SHIFT 20
@ -54,81 +24,30 @@
#define OMAP2430_ST_I2CHS2_SHIFT 20
#define OMAP24XX_ST_MCBSP2_SHIFT 16
#define OMAP24XX_ST_MCBSP1_SHIFT 15
#define OMAP24XX_ST_DSS_SHIFT 0
#define OMAP2430_ST_MCBSP5_SHIFT 5
#define OMAP2430_ST_MCBSP4_SHIFT 4
#define OMAP2430_ST_MCBSP3_SHIFT 3
#define OMAP24XX_ST_AES_SHIFT 3
#define OMAP24XX_ST_RNG_SHIFT 2
#define OMAP24XX_ST_SHA_SHIFT 1
#define OMAP24XX_AUTO_SDRC_SHIFT 2
#define OMAP24XX_AUTO_GPMC_SHIFT 1
#define OMAP24XX_AUTO_SDMA_SHIFT 0
#define OMAP24XX_CLKSEL_USB_MASK (0x7 << 25)
#define OMAP24XX_CLKSEL_SSI_MASK (0x1f << 20)
#define OMAP2420_CLKSEL_VLYNQ_MASK (0x1f << 15)
#define OMAP24XX_CLKSEL_DSS2_MASK (0x1 << 13)
#define OMAP24XX_CLKSEL_DSS1_MASK (0x1f << 8)
#define OMAP24XX_CLKSEL_L4_SHIFT 5
#define OMAP24XX_CLKSEL_L4_WIDTH 2
#define OMAP24XX_CLKSEL_L3_SHIFT 0
#define OMAP24XX_CLKSEL_L3_WIDTH 5
#define OMAP24XX_CLKSEL_GPT12_MASK (0x3 << 22)
#define OMAP24XX_CLKSEL_GPT11_MASK (0x3 << 20)
#define OMAP24XX_CLKSEL_GPT10_MASK (0x3 << 18)
#define OMAP24XX_CLKSEL_GPT9_MASK (0x3 << 16)
#define OMAP24XX_CLKSEL_GPT8_MASK (0x3 << 14)
#define OMAP24XX_CLKSEL_GPT7_MASK (0x3 << 12)
#define OMAP24XX_CLKSEL_GPT6_MASK (0x3 << 10)
#define OMAP24XX_CLKSEL_GPT5_MASK (0x3 << 8)
#define OMAP24XX_CLKSEL_GPT4_MASK (0x3 << 6)
#define OMAP24XX_CLKSEL_GPT3_MASK (0x3 << 4)
#define OMAP24XX_CLKSEL_GPT2_MASK (0x3 << 2)
#define OMAP24XX_AUTOSTATE_DSS_MASK (1 << 2)
#define OMAP24XX_AUTOSTATE_L4_MASK (1 << 1)
#define OMAP24XX_AUTOSTATE_L3_MASK (1 << 0)
#define OMAP24XX_EN_3D_SHIFT 2
#define OMAP24XX_EN_2D_SHIFT 1
#define OMAP24XX_AUTOSTATE_GFX_MASK (1 << 0)
#define OMAP2430_EN_ICR_SHIFT 6
#define OMAP24XX_EN_OMAPCTRL_SHIFT 5
#define OMAP24XX_EN_WDT1_SHIFT 4
#define OMAP24XX_EN_32KSYNC_SHIFT 1
#define OMAP24XX_ST_MPU_WDT_SHIFT 3
#define OMAP24XX_ST_32KSYNC_SHIFT 1
#define OMAP24XX_CLKSEL_GPT1_MASK (0x3 << 0)
#define OMAP24XX_EN_54M_PLL_SHIFT 6
#define OMAP24XX_EN_96M_PLL_SHIFT 2
#define OMAP24XX_EN_DPLL_MASK (0x3 << 0)
#define OMAP24XX_ST_54M_APLL_SHIFT 9
#define OMAP24XX_ST_96M_APLL_SHIFT 8
#define OMAP24XX_AUTO_54M_MASK (0x3 << 6)
#define OMAP24XX_AUTO_96M_MASK (0x3 << 2)
#define OMAP24XX_AUTO_DPLL_SHIFT 0
#define OMAP24XX_AUTO_DPLL_MASK (0x3 << 0)
#define OMAP24XX_APLLS_CLKIN_SHIFT 23
#define OMAP24XX_APLLS_CLKIN_WIDTH 3
#define OMAP24XX_APLLS_CLKIN_MASK (0x7 << 23)
#define OMAP24XX_DPLL_MULT_MASK (0x3ff << 12)
#define OMAP24XX_DPLL_DIV_MASK (0xf << 8)
#define OMAP24XX_54M_SOURCE_SHIFT 5
#define OMAP24XX_54M_SOURCE_WIDTH 1
#define OMAP2430_96M_SOURCE_SHIFT 4
#define OMAP2430_96M_SOURCE_WIDTH 1
#define OMAP24XX_48M_SOURCE_MASK (1 << 3)
#define OMAP24XX_CORE_CLK_SRC_MASK (0x3 << 0)
#define OMAP2420_EN_IVA_COP_SHIFT 10
#define OMAP2420_EN_IVA_MPU_SHIFT 8
#define OMAP24XX_CM_FCLKEN_DSP_EN_DSP_SHIFT 0
#define OMAP2420_EN_DSP_IPI_SHIFT 1
#define OMAP2420_CLKSEL_IVA_MASK (0x1f << 8)
#define OMAP24XX_CLKSEL_DSP_IF_MASK (0x3 << 5)
#define OMAP24XX_CLKSEL_DSP_MASK (0x1f << 0)
#define OMAP2420_AUTOSTATE_IVA_MASK (1 << 8)
#define OMAP24XX_AUTOSTATE_DSP_MASK (1 << 0)
#define OMAP2430_EN_OSC_SHIFT 1
#define OMAP2430_CM_ICLKEN_MDM_EN_MDM_SHIFT 0
#define OMAP2430_CLKSEL_MDM_MASK (0xf << 0)
#define OMAP2430_AUTOSTATE_MDM_MASK (1 << 0)
#define OMAP24XX_CLKSTCTRL_DISABLE_AUTO 0x0
#define OMAP24XX_CLKSTCTRL_ENABLE_AUTO 0x1

162
arch/arm/mach-omap2/cm-regbits-34xx.h
View File

@ -14,68 +14,11 @@
* published by the Free Software Foundation.
*/
#define OMAP3430ES2_EN_MMC3_SHIFT 30
#define OMAP3430_EN_MSPRO_SHIFT 23
#define OMAP3430_EN_HDQ_SHIFT 22
#define OMAP3430ES1_EN_FSHOSTUSB_SHIFT 5
#define OMAP3430ES1_EN_D2D_SHIFT 3
#define OMAP3430_EN_SSI_SHIFT 0
#define OMAP3430ES2_EN_USBTLL_SHIFT 2
#define OMAP3430_EN_WDT2_SHIFT 5
#define OMAP3430_EN_CAM_SHIFT 0
#define OMAP3430_EN_WDT3_SHIFT 12
#define OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_MASK (1 << 0)
#define OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_SHIFT 0
#define OMAP3430_IVA2_DPLL_FREQSEL_SHIFT 4
#define OMAP3430_IVA2_DPLL_FREQSEL_MASK (0xf << 4)
#define OMAP3430_EN_IVA2_DPLL_DRIFTGUARD_SHIFT 3
#define OMAP3430_EN_IVA2_DPLL_SHIFT 0
#define OMAP3430_EN_IVA2_DPLL_MASK (0x7 << 0)
#define OMAP3430_ST_IVA2_SHIFT 0
#define OMAP3430_ST_IVA2_CLK_MASK (1 << 0)
#define OMAP3430_AUTO_IVA2_DPLL_SHIFT 0
#define OMAP3430_AUTO_IVA2_DPLL_MASK (0x7 << 0)
#define OMAP3430_IVA2_CLK_SRC_SHIFT 19
#define OMAP3430_IVA2_CLK_SRC_WIDTH 3
#define OMAP3430_IVA2_DPLL_MULT_MASK (0x7ff << 8)
#define OMAP3430_IVA2_DPLL_DIV_MASK (0x7f << 0)
#define OMAP3430_IVA2_DPLL_CLKOUT_DIV_SHIFT 0
#define OMAP3430_IVA2_DPLL_CLKOUT_DIV_WIDTH 5
#define OMAP3430_CLKTRCTRL_IVA2_MASK (0x3 << 0)
#define OMAP3430_CLKACTIVITY_IVA2_MASK (1 << 0)
#define OMAP3430_MPU_DPLL_FREQSEL_MASK (0xf << 4)
#define OMAP3430_EN_MPU_DPLL_DRIFTGUARD_SHIFT 3
#define OMAP3430_EN_MPU_DPLL_MASK (0x7 << 0)
#define OMAP3430_ST_MPU_CLK_SHIFT 0
#define OMAP3430_ST_MPU_CLK_MASK (1 << 0)
#define OMAP3430_ST_MPU_CLK_WIDTH 1
#define OMAP3430_AUTO_MPU_DPLL_MASK (0x7 << 0)
#define OMAP3430_MPU_CLK_SRC_SHIFT 19
#define OMAP3430_MPU_CLK_SRC_WIDTH 3
#define OMAP3430_MPU_DPLL_MULT_MASK (0x7ff << 8)
#define OMAP3430_MPU_DPLL_DIV_MASK (0x7f << 0)
#define OMAP3430_MPU_DPLL_CLKOUT_DIV_SHIFT 0
#define OMAP3430_MPU_DPLL_CLKOUT_DIV_WIDTH 5
#define OMAP3430_CLKTRCTRL_MPU_MASK (0x3 << 0)
#define OMAP3430_EN_MODEM_SHIFT 31
#define OMAP3430_EN_ICR_SHIFT 29
#define OMAP3430_EN_AES2_SHIFT 28
#define OMAP3430_EN_SHA12_SHIFT 27
#define OMAP3430_EN_DES2_SHIFT 26
#define OMAP3430ES1_EN_FAC_SHIFT 8
#define OMAP3430_EN_MAILBOXES_SHIFT 7
#define OMAP3430_EN_OMAPCTRL_SHIFT 6
#define OMAP3430_EN_SAD2D_SHIFT 3
#define OMAP3430_EN_SDRC_SHIFT 1
#define AM35XX_EN_IPSS_SHIFT 4
#define OMAP3430_EN_PKA_SHIFT 4
#define OMAP3430_EN_AES1_SHIFT 3
#define OMAP3430_EN_RNG_SHIFT 2
#define OMAP3430_EN_SHA11_SHIFT 1
#define OMAP3430_EN_DES1_SHIFT 0
#define OMAP3430_EN_MAD2D_SHIFT 3
#define OMAP3430ES2_EN_TS_SHIFT 1
#define OMAP3430ES2_EN_CPEFUSE_SHIFT 0
#define OMAP3430_ST_AES2_SHIFT 28
#define OMAP3430_ST_SHA12_SHIFT 27
#define AM35XX_ST_UART4_SHIFT 23
@ -84,131 +27,26 @@
#define OMAP3430_ST_MAILBOXES_SHIFT 7
#define OMAP3430_ST_SAD2D_SHIFT 3
#define OMAP3430_ST_SDMA_SHIFT 2
#define AM35XX_ST_IPSS_SHIFT 5
#define OMAP3430ES2_ST_USBTLL_SHIFT 2
#define OMAP3430_CLKSEL_SSI_MASK (0xf << 8)
#define OMAP3430_CLKSEL_GPT11_MASK (1 << 7)
#define OMAP3430_CLKSEL_GPT10_MASK (1 << 6)
#define OMAP3430ES1_CLKSEL_FSHOSTUSB_MASK (0x3 << 4)
#define OMAP3430_CLKSEL_L4_SHIFT 2
#define OMAP3430_CLKSEL_L4_WIDTH 2
#define OMAP3430_CLKSEL_L3_SHIFT 0
#define OMAP3430_CLKSEL_L3_WIDTH 2
#define OMAP3630_CLKSEL_96M_MASK (0x3 << 12)
#define OMAP3430ES1_CLKTRCTRL_D2D_MASK (0x3 << 4)
#define OMAP3430_CLKTRCTRL_L4_MASK (0x3 << 2)
#define OMAP3430_CLKTRCTRL_L3_MASK (0x3 << 0)
#define OMAP3430ES1_EN_3D_SHIFT 2
#define OMAP3430ES1_EN_2D_SHIFT 1
#define OMAP3430ES1_CLKTRCTRL_GFX_MASK (0x3 << 0)
#define OMAP3430ES2_CM_FCLKEN_SGX_EN_SGX_SHIFT 1
#define OMAP3430ES2_CM_ICLKEN_SGX_EN_SGX_SHIFT 0
#define OMAP3430ES2_CLKSEL_SGX_MASK (0x7 << 0)
#define OMAP3430ES2_CLKTRCTRL_SGX_MASK (0x3 << 0)
#define OMAP3430ES2_EN_USIMOCP_SHIFT 9
#define OMAP3430_EN_WDT1_SHIFT 4
#define OMAP3430_EN_32KSYNC_SHIFT 2
#define OMAP3430_ST_WDT2_SHIFT 5
#define OMAP3430_ST_32KSYNC_SHIFT 2
#define OMAP3430ES2_CLKSEL_USIMOCP_MASK (0xf << 3)
#define OMAP3430_CLKSEL_RM_SHIFT 1
#define OMAP3430_CLKSEL_RM_WIDTH 2
#define OMAP3430_CLKSEL_GPT1_MASK (1 << 0)
#define OMAP3430_PWRDN_EMU_PERIPH_SHIFT 31
#define OMAP3430_PWRDN_CAM_SHIFT 30
#define OMAP3430_PWRDN_DSS1_SHIFT 29
#define OMAP3430_PWRDN_TV_SHIFT 28
#define OMAP3430_PWRDN_96M_SHIFT 27
#define OMAP3430_PERIPH_DPLL_FREQSEL_MASK (0xf << 20)
#define OMAP3430_EN_PERIPH_DPLL_DRIFTGUARD_SHIFT 19
#define OMAP3430_EN_PERIPH_DPLL_MASK (0x7 << 16)
#define OMAP3430_PWRDN_EMU_CORE_SHIFT 12
#define OMAP3430_CORE_DPLL_FREQSEL_MASK (0xf << 4)
#define OMAP3430_EN_CORE_DPLL_DRIFTGUARD_SHIFT 3
#define OMAP3430_EN_CORE_DPLL_MASK (0x7 << 0)
#define OMAP3430ES2_PERIPH2_DPLL_FREQSEL_MASK (0xf << 4)
#define OMAP3430ES2_EN_PERIPH2_DPLL_DRIFTGUARD_SHIFT 3
#define OMAP3430ES2_EN_PERIPH2_DPLL_MASK (0x7 << 0)
#define OMAP3430_ST_PERIPH_CLK_MASK (1 << 1)
#define OMAP3430_ST_CORE_CLK_MASK (1 << 0)
#define OMAP3430ES2_ST_PERIPH2_CLK_MASK (1 << 0)
#define OMAP3430_AUTO_PERIPH_DPLL_MASK (0x7 << 3)
#define OMAP3430_AUTO_CORE_DPLL_MASK (0x7 << 0)
#define OMAP3430ES2_AUTO_PERIPH2_DPLL_MASK (0x7 << 0)
#define OMAP3430_CORE_DPLL_CLKOUT_DIV_SHIFT 27
#define OMAP3430_CORE_DPLL_CLKOUT_DIV_WIDTH 5
#define OMAP3430_CORE_DPLL_MULT_MASK (0x7ff << 16)
#define OMAP3430_CORE_DPLL_DIV_MASK (0x7f << 8)
#define OMAP3430_SOURCE_96M_SHIFT 6
#define OMAP3430_SOURCE_96M_WIDTH 1
#define OMAP3430_SOURCE_54M_SHIFT 5
#define OMAP3430_SOURCE_54M_WIDTH 1
#define OMAP3430_SOURCE_48M_MASK (1 << 3)
#define OMAP3430_PERIPH_DPLL_MULT_MASK (0x7ff << 8)
#define OMAP3630_PERIPH_DPLL_MULT_MASK (0xfff << 8)
#define OMAP3430_PERIPH_DPLL_DIV_MASK (0x7f << 0)
#define OMAP3630_PERIPH_DPLL_DCO_SEL_MASK (0x7 << 21)
#define OMAP3630_PERIPH_DPLL_SD_DIV_MASK (0xff << 24)
#define OMAP3430_DIV_96M_SHIFT 0
#define OMAP3630_DIV_96M_WIDTH 6
#define OMAP3430ES2_PERIPH2_DPLL_MULT_MASK (0x7ff << 8)
#define OMAP3430ES2_PERIPH2_DPLL_DIV_MASK (0x7f << 0)
#define OMAP3430ES2_DIV_120M_SHIFT 0
#define OMAP3430ES2_DIV_120M_WIDTH 5
#define OMAP3430_CLKOUT2_EN_SHIFT 7
#define OMAP3430_CLKOUT2_DIV_SHIFT 3
#define OMAP3430_CLKOUT2_DIV_WIDTH 3
#define OMAP3430_CLKOUT2SOURCE_MASK (0x3 << 0)
#define OMAP3430_EN_TV_SHIFT 2
#define OMAP3430_EN_DSS2_SHIFT 1
#define OMAP3430_EN_DSS1_SHIFT 0
#define OMAP3430_CM_ICLKEN_DSS_EN_DSS_SHIFT 0
#define OMAP3430ES2_ST_DSS_IDLE_SHIFT 1
#define OMAP3430ES2_ST_DSS_STDBY_SHIFT 0
#define OMAP3430ES1_ST_DSS_SHIFT 0
#define OMAP3430_CLKSEL_TV_SHIFT 8
#define OMAP3630_CLKSEL_TV_WIDTH 6
#define OMAP3430_CLKSEL_DSS1_SHIFT 0
#define OMAP3630_CLKSEL_DSS1_WIDTH 6
#define OMAP3430_CLKTRCTRL_DSS_MASK (0x3 << 0)
#define OMAP3430_EN_CSI2_SHIFT 1
#define OMAP3430_CLKSEL_CAM_SHIFT 0
#define OMAP3630_CLKSEL_CAM_WIDTH 6
#define OMAP3430_CLKTRCTRL_CAM_MASK (0x3 << 0)
#define OMAP3430_ST_MCBSP4_SHIFT 2
#define OMAP3430_ST_MCBSP3_SHIFT 1
#define OMAP3430_ST_MCBSP2_SHIFT 0
#define OMAP3430_CLKSEL_GPT9_MASK (1 << 7)
#define OMAP3430_CLKSEL_GPT8_MASK (1 << 6)
#define OMAP3430_CLKSEL_GPT7_MASK (1 << 5)
#define OMAP3430_CLKSEL_GPT6_MASK (1 << 4)
#define OMAP3430_CLKSEL_GPT5_MASK (1 << 3)
#define OMAP3430_CLKSEL_GPT4_MASK (1 << 2)
#define OMAP3430_CLKSEL_GPT3_MASK (1 << 1)
#define OMAP3430_CLKSEL_GPT2_MASK (1 << 0)
#define OMAP3430_CLKTRCTRL_PER_MASK (0x3 << 0)
#define OMAP3430_DIV_DPLL4_SHIFT 24
#define OMAP3630_DIV_DPLL4_WIDTH 6
#define OMAP3430_DIV_DPLL3_SHIFT 16
#define OMAP3430_DIV_DPLL3_WIDTH 5
#define OMAP3430_CLKSEL_TRACECLK_SHIFT 11
#define OMAP3430_CLKSEL_TRACECLK_WIDTH 3
#define OMAP3430_CLKSEL_PCLK_SHIFT 8
#define OMAP3430_CLKSEL_PCLK_WIDTH 3
#define OMAP3430_CLKSEL_PCLKX2_SHIFT 6
#define OMAP3430_CLKSEL_PCLKX2_WIDTH 2
#define OMAP3430_CLKSEL_ATCLK_SHIFT 4
#define OMAP3430_CLKSEL_ATCLK_WIDTH 2
#define OMAP3430_TRACE_MUX_CTRL_SHIFT 2
#define OMAP3430_TRACE_MUX_CTRL_WIDTH 2
#define OMAP3430_MUX_CTRL_MASK (0x3 << 0)
#define OMAP3430_CLKTRCTRL_EMU_MASK (0x3 << 0)
#define OMAP3430_CLKTRCTRL_NEON_MASK (0x3 << 0)
#define OMAP3430ES2_EN_USBHOST2_SHIFT 1
#define OMAP3430ES2_EN_USBHOST1_SHIFT 0
#define OMAP3430ES2_EN_USBHOST_SHIFT 0
#define OMAP3430ES2_ST_USBHOST_IDLE_SHIFT 1
#define OMAP3430ES2_ST_USBHOST_STDBY_SHIFT 0
#define OMAP3430ES2_CLKTRCTRL_USBHOST_MASK (3 << 0)
#define OMAP34XX_CLKSTCTRL_DISABLE_AUTO 0x0
#define OMAP34XX_CLKSTCTRL_FORCE_SLEEP 0x1

17
arch/arm/mach-omap2/id.c
View File

@ -657,8 +657,11 @@ void __init dra7xxx_check_revision(void)
{
u32 idcode;
u16 hawkeye;
u8 rev;
u8 rev, package;
struct omap_die_id odi;
omap_get_die_id(&odi);
package = (odi.id_2 >> 16) & 0x3;
idcode = read_tap_reg(OMAP_TAP_IDCODE);
hawkeye = (idcode >> 12) & 0xffff;
rev = (idcode >> 28) & 0xff;
@ -667,7 +670,17 @@ void __init dra7xxx_check_revision(void)
switch (rev) {
case 0:
default:
omap_revision = DRA762_REV_ES1_0;
switch (package) {
case 0x2:
omap_revision = DRA762_ABZ_REV_ES1_0;
break;
case 0x3:
omap_revision = DRA762_ACD_REV_ES1_0;
break;
default:
omap_revision = DRA762_REV_ES1_0;
break;
}
break;
}
break;

4
arch/arm/mach-omap2/omap_hwmod.c
View File

@ -715,7 +715,7 @@ static const struct of_device_id ti_clkctrl_match_table[] __initconst = {
{ }
};
static int _setup_clkctrl_provider(struct device_node *np)
static int __init _setup_clkctrl_provider(struct device_node *np)
{
const __be32 *addrp;
struct clkctrl_provider *provider;
@ -743,7 +743,7 @@ static int _setup_clkctrl_provider(struct device_node *np)
return 0;
}
static int _init_clkctrl_providers(void)
static int __init _init_clkctrl_providers(void)
{
struct device_node *np;
int ret = 0;

6
arch/arm/mach-omap2/omap_hwmod.h
View File

@ -343,11 +343,8 @@ struct omap_hwmod_class_sysconfig {
/**
* struct omap_hwmod_omap2_prcm - OMAP2/3-specific PRCM data
* @module_offs: PRCM submodule offset from the start of the PRM/CM
* @prcm_reg_id: PRCM register ID (e.g., 3 for CM_AUTOIDLE3)
* @module_bit: register bit shift for AUTOIDLE, WKST, WKEN, GRPSEL regs
* @idlest_reg_id: IDLEST register ID (e.g., 3 for CM_IDLEST3)
* @idlest_idle_bit: register bit shift for CM_IDLEST slave idle bit
* @idlest_stdby_bit: register bit shift for CM_IDLEST master standby bit
*
* @prcm_reg_id and @module_bit are specific to the AUTOIDLE, WKST,
* WKEN, GRPSEL registers. In an ideal world, no extra information
@ -357,11 +354,8 @@ struct omap_hwmod_class_sysconfig {
*/
struct omap_hwmod_omap2_prcm {
s16 module_offs;
u8 prcm_reg_id;
u8 module_bit;
u8 idlest_reg_id;
u8 idlest_idle_bit;
u8 idlest_stdby_bit;
};
/*

14
arch/arm/mach-omap2/omap_hwmod_2420_data.c
View File

@ -111,8 +111,6 @@ static struct omap_hwmod omap2420_i2c1_hwmod = {
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
.prcm_reg_id = 1,
.module_bit = OMAP2420_EN_I2C1_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP2420_ST_I2C1_SHIFT,
},
@ -134,8 +132,6 @@ static struct omap_hwmod omap2420_i2c2_hwmod = {
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
.prcm_reg_id = 1,
.module_bit = OMAP2420_EN_I2C2_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP2420_ST_I2C2_SHIFT,
},
@ -167,8 +163,6 @@ static struct omap_hwmod omap2420_mailbox_hwmod = {
.main_clk = "mailboxes_ick",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_MAILBOXES_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_MAILBOXES_SHIFT,
@ -197,8 +191,6 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod = {
.main_clk = "mcbsp1_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_MCBSP1_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT,
@ -215,8 +207,6 @@ static struct omap_hwmod omap2420_mcbsp2_hwmod = {
.main_clk = "mcbsp2_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_MCBSP2_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT,
@ -247,8 +237,6 @@ static struct omap_hwmod omap2420_msdi1_hwmod = {
.main_clk = "mmc_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP2420_EN_MMC_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP2420_ST_MMC_SHIFT,
@ -264,8 +252,6 @@ static struct omap_hwmod omap2420_hdq1w_hwmod = {
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_HDQ_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_HDQ_SHIFT,
},

28
arch/arm/mach-omap2/omap_hwmod_2430_data.c
View File

@ -97,8 +97,6 @@ static struct omap_hwmod omap2430_i2c1_hwmod = {
* to hwmod framework.
*/
.module_offs = CORE_MOD,
.prcm_reg_id = 1,
.module_bit = OMAP2430_EN_I2CHS1_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP2430_ST_I2CHS1_SHIFT,
},
@ -115,8 +113,6 @@ static struct omap_hwmod omap2430_i2c2_hwmod = {
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
.prcm_reg_id = 1,
.module_bit = OMAP2430_EN_I2CHS2_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP2430_ST_I2CHS2_SHIFT,
},
@ -132,8 +128,6 @@ static struct omap_hwmod omap2430_gpio5_hwmod = {
.main_clk = "gpio5_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 2,
.module_bit = OMAP2430_EN_GPIO5_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 2,
.idlest_idle_bit = OMAP2430_ST_GPIO5_SHIFT,
@ -165,8 +159,6 @@ static struct omap_hwmod omap2430_mailbox_hwmod = {
.main_clk = "mailboxes_ick",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_MAILBOXES_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_MAILBOXES_SHIFT,
@ -185,8 +177,6 @@ static struct omap_hwmod omap2430_mcspi3_hwmod = {
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
.prcm_reg_id = 2,
.module_bit = OMAP2430_EN_MCSPI3_SHIFT,
.idlest_reg_id = 2,
.idlest_idle_bit = OMAP2430_ST_MCSPI3_SHIFT,
},
@ -219,8 +209,6 @@ static struct omap_hwmod omap2430_usbhsotg_hwmod = {
.main_clk = "usbhs_ick",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP2430_EN_USBHS_MASK,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP2430_ST_USBHS_SHIFT,
@ -266,8 +254,6 @@ static struct omap_hwmod omap2430_mcbsp1_hwmod = {
.main_clk = "mcbsp1_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_MCBSP1_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT,
@ -284,8 +270,6 @@ static struct omap_hwmod omap2430_mcbsp2_hwmod = {
.main_clk = "mcbsp2_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_MCBSP2_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT,
@ -302,8 +286,6 @@ static struct omap_hwmod omap2430_mcbsp3_hwmod = {
.main_clk = "mcbsp3_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP2430_EN_MCBSP3_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 2,
.idlest_idle_bit = OMAP2430_ST_MCBSP3_SHIFT,
@ -320,8 +302,6 @@ static struct omap_hwmod omap2430_mcbsp4_hwmod = {
.main_clk = "mcbsp4_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP2430_EN_MCBSP4_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 2,
.idlest_idle_bit = OMAP2430_ST_MCBSP4_SHIFT,
@ -338,8 +318,6 @@ static struct omap_hwmod omap2430_mcbsp5_hwmod = {
.main_clk = "mcbsp5_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP2430_EN_MCBSP5_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 2,
.idlest_idle_bit = OMAP2430_ST_MCBSP5_SHIFT,
@ -384,8 +362,6 @@ static struct omap_hwmod omap2430_mmc1_hwmod = {
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
.prcm_reg_id = 2,
.module_bit = OMAP2430_EN_MMCHS1_SHIFT,
.idlest_reg_id = 2,
.idlest_idle_bit = OMAP2430_ST_MMCHS1_SHIFT,
},
@ -408,8 +384,6 @@ static struct omap_hwmod omap2430_mmc2_hwmod = {
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
.prcm_reg_id = 2,
.module_bit = OMAP2430_EN_MMCHS2_SHIFT,
.idlest_reg_id = 2,
.idlest_idle_bit = OMAP2430_ST_MMCHS2_SHIFT,
},
@ -424,8 +398,6 @@ static struct omap_hwmod omap2430_hdq1w_hwmod = {
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_HDQ_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_HDQ_SHIFT,
},

64
arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
View File

@ -242,8 +242,6 @@ struct omap_hwmod omap2xxx_timer1_hwmod = {
.main_clk = "gpt1_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_GPT1_SHIFT,
.module_offs = WKUP_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_GPT1_SHIFT,
@ -261,8 +259,6 @@ struct omap_hwmod omap2xxx_timer2_hwmod = {
.main_clk = "gpt2_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_GPT2_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_GPT2_SHIFT,
@ -279,8 +275,6 @@ struct omap_hwmod omap2xxx_timer3_hwmod = {
.main_clk = "gpt3_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_GPT3_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_GPT3_SHIFT,
@ -297,8 +291,6 @@ struct omap_hwmod omap2xxx_timer4_hwmod = {
.main_clk = "gpt4_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_GPT4_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_GPT4_SHIFT,
@ -315,8 +307,6 @@ struct omap_hwmod omap2xxx_timer5_hwmod = {
.main_clk = "gpt5_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_GPT5_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_GPT5_SHIFT,
@ -334,8 +324,6 @@ struct omap_hwmod omap2xxx_timer6_hwmod = {
.main_clk = "gpt6_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_GPT6_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_GPT6_SHIFT,
@ -353,8 +341,6 @@ struct omap_hwmod omap2xxx_timer7_hwmod = {
.main_clk = "gpt7_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_GPT7_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_GPT7_SHIFT,
@ -372,8 +358,6 @@ struct omap_hwmod omap2xxx_timer8_hwmod = {
.main_clk = "gpt8_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_GPT8_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_GPT8_SHIFT,
@ -391,8 +375,6 @@ struct omap_hwmod omap2xxx_timer9_hwmod = {
.main_clk = "gpt9_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_GPT9_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_GPT9_SHIFT,
@ -410,8 +392,6 @@ struct omap_hwmod omap2xxx_timer10_hwmod = {
.main_clk = "gpt10_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_GPT10_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_GPT10_SHIFT,
@ -429,8 +409,6 @@ struct omap_hwmod omap2xxx_timer11_hwmod = {
.main_clk = "gpt11_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_GPT11_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_GPT11_SHIFT,
@ -448,8 +426,6 @@ struct omap_hwmod omap2xxx_timer12_hwmod = {
.main_clk = "gpt12_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_GPT12_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_GPT12_SHIFT,
@ -467,8 +443,6 @@ struct omap_hwmod omap2xxx_wd_timer2_hwmod = {
.main_clk = "mpu_wdt_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_MPU_WDT_SHIFT,
.module_offs = WKUP_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_MPU_WDT_SHIFT,
@ -485,8 +459,6 @@ struct omap_hwmod omap2xxx_uart1_hwmod = {
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_UART1_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_EN_UART1_SHIFT,
},
@ -503,8 +475,6 @@ struct omap_hwmod omap2xxx_uart2_hwmod = {
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_UART2_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_EN_UART2_SHIFT,
},
@ -521,8 +491,6 @@ struct omap_hwmod omap2xxx_uart3_hwmod = {
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
.prcm_reg_id = 2,
.module_bit = OMAP24XX_EN_UART3_SHIFT,
.idlest_reg_id = 2,
.idlest_idle_bit = OMAP24XX_EN_UART3_SHIFT,
},
@ -547,11 +515,8 @@ struct omap_hwmod omap2xxx_dss_core_hwmod = {
.main_clk = "dss1_fck", /* instead of dss_fck */
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_DSS1_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_stdby_bit = OMAP24XX_ST_DSS_SHIFT,
},
},
.opt_clks = dss_opt_clks,
@ -565,11 +530,8 @@ struct omap_hwmod omap2xxx_dss_dispc_hwmod = {
.main_clk = "dss1_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_DSS1_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_stdby_bit = OMAP24XX_ST_DSS_SHIFT,
},
},
.flags = HWMOD_NO_IDLEST,
@ -586,8 +548,6 @@ struct omap_hwmod omap2xxx_dss_rfbi_hwmod = {
.main_clk = "dss1_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_DSS1_SHIFT,
.module_offs = CORE_MOD,
},
},
@ -602,8 +562,6 @@ struct omap_hwmod omap2xxx_dss_venc_hwmod = {
.main_clk = "dss_54m_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_DSS1_SHIFT,
.module_offs = CORE_MOD,
},
},
@ -623,8 +581,6 @@ struct omap_hwmod omap2xxx_gpio1_hwmod = {
.main_clk = "gpios_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_GPIOS_SHIFT,
.module_offs = WKUP_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT,
@ -641,8 +597,6 @@ struct omap_hwmod omap2xxx_gpio2_hwmod = {
.main_clk = "gpios_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_GPIOS_SHIFT,
.module_offs = WKUP_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT,
@ -659,8 +613,6 @@ struct omap_hwmod omap2xxx_gpio3_hwmod = {
.main_clk = "gpios_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_GPIOS_SHIFT,
.module_offs = WKUP_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT,
@ -677,8 +629,6 @@ struct omap_hwmod omap2xxx_gpio4_hwmod = {
.main_clk = "gpios_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_GPIOS_SHIFT,
.module_offs = WKUP_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT,
@ -699,8 +649,6 @@ struct omap_hwmod omap2xxx_mcspi1_hwmod = {
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_MCSPI1_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_MCSPI1_SHIFT,
},
@ -720,8 +668,6 @@ struct omap_hwmod omap2xxx_mcspi2_hwmod = {
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_MCSPI2_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_MCSPI2_SHIFT,
},
@ -740,8 +686,6 @@ struct omap_hwmod omap2xxx_counter_32k_hwmod = {
.prcm = {
.omap2 = {
.module_offs = WKUP_MOD,
.prcm_reg_id = 1,
.module_bit = OMAP24XX_ST_32KSYNC_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_32KSYNC_SHIFT,
},
@ -758,8 +702,6 @@ struct omap_hwmod omap2xxx_gpmc_hwmod = {
.flags = HWMOD_NO_IDLEST | DEBUG_OMAP_GPMC_HWMOD_FLAGS,
.prcm = {
.omap2 = {
.prcm_reg_id = 3,
.module_bit = OMAP24XX_EN_GPMC_MASK,
.module_offs = CORE_MOD,
},
},
@ -787,8 +729,6 @@ struct omap_hwmod omap2xxx_rng_hwmod = {
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
.prcm_reg_id = 4,
.module_bit = OMAP24XX_EN_RNG_SHIFT,
.idlest_reg_id = 4,
.idlest_idle_bit = OMAP24XX_ST_RNG_SHIFT,
},
@ -825,8 +765,6 @@ struct omap_hwmod omap2xxx_sham_hwmod = {
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
.prcm_reg_id = 4,
.module_bit = OMAP24XX_EN_SHA_SHIFT,
.idlest_reg_id = 4,
.idlest_idle_bit = OMAP24XX_ST_SHA_SHIFT,
},
@ -856,8 +794,6 @@ struct omap_hwmod omap2xxx_aes_hwmod = {
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
.prcm_reg_id = 4,
.module_bit = OMAP24XX_EN_AES_SHIFT,
.idlest_reg_id = 4,
.idlest_idle_bit = OMAP24XX_ST_AES_SHIFT,
},

131
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
View File

@ -113,8 +113,6 @@ static struct omap_hwmod omap3xxx_iva_hwmod = {
.prcm = {
.omap2 = {
.module_offs = OMAP3430_IVA2_MOD,
.prcm_reg_id = 1,
.module_bit = OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_IVA2_SHIFT,
},
@ -188,8 +186,6 @@ static struct omap_hwmod omap3xxx_timer1_hwmod = {
.main_clk = "gpt1_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_GPT1_SHIFT,
.module_offs = WKUP_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_GPT1_SHIFT,
@ -206,8 +202,6 @@ static struct omap_hwmod omap3xxx_timer2_hwmod = {
.main_clk = "gpt2_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_GPT2_SHIFT,
.module_offs = OMAP3430_PER_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_GPT2_SHIFT,
@ -223,8 +217,6 @@ static struct omap_hwmod omap3xxx_timer3_hwmod = {
.main_clk = "gpt3_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_GPT3_SHIFT,
.module_offs = OMAP3430_PER_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_GPT3_SHIFT,
@ -240,8 +232,6 @@ static struct omap_hwmod omap3xxx_timer4_hwmod = {
.main_clk = "gpt4_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_GPT4_SHIFT,
.module_offs = OMAP3430_PER_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_GPT4_SHIFT,
@ -257,8 +247,6 @@ static struct omap_hwmod omap3xxx_timer5_hwmod = {
.main_clk = "gpt5_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_GPT5_SHIFT,
.module_offs = OMAP3430_PER_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_GPT5_SHIFT,
@ -275,8 +263,6 @@ static struct omap_hwmod omap3xxx_timer6_hwmod = {
.main_clk = "gpt6_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_GPT6_SHIFT,
.module_offs = OMAP3430_PER_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_GPT6_SHIFT,
@ -293,8 +279,6 @@ static struct omap_hwmod omap3xxx_timer7_hwmod = {
.main_clk = "gpt7_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_GPT7_SHIFT,
.module_offs = OMAP3430_PER_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_GPT7_SHIFT,
@ -311,8 +295,6 @@ static struct omap_hwmod omap3xxx_timer8_hwmod = {
.main_clk = "gpt8_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_GPT8_SHIFT,
.module_offs = OMAP3430_PER_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_GPT8_SHIFT,
@ -329,8 +311,6 @@ static struct omap_hwmod omap3xxx_timer9_hwmod = {
.main_clk = "gpt9_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_GPT9_SHIFT,
.module_offs = OMAP3430_PER_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_GPT9_SHIFT,
@ -347,8 +327,6 @@ static struct omap_hwmod omap3xxx_timer10_hwmod = {
.main_clk = "gpt10_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_GPT10_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_GPT10_SHIFT,
@ -365,8 +343,6 @@ static struct omap_hwmod omap3xxx_timer11_hwmod = {
.main_clk = "gpt11_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_GPT11_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_GPT11_SHIFT,
@ -384,8 +360,6 @@ static struct omap_hwmod omap3xxx_timer12_hwmod = {
.main_clk = "gpt12_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_GPT12_SHIFT,
.module_offs = WKUP_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_GPT12_SHIFT,
@ -439,8 +413,6 @@ static struct omap_hwmod omap3xxx_wd_timer2_hwmod = {
.main_clk = "wdt2_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_WDT2_SHIFT,
.module_offs = WKUP_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_WDT2_SHIFT,
@ -461,8 +433,6 @@ static struct omap_hwmod omap3xxx_uart1_hwmod = {
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_UART1_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_EN_UART1_SHIFT,
},
@ -478,8 +448,6 @@ static struct omap_hwmod omap3xxx_uart2_hwmod = {
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_UART2_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_EN_UART2_SHIFT,
},
@ -496,8 +464,6 @@ static struct omap_hwmod omap3xxx_uart3_hwmod = {
.prcm = {
.omap2 = {
.module_offs = OMAP3430_PER_MOD,
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_UART3_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_EN_UART3_SHIFT,
},
@ -515,8 +481,6 @@ static struct omap_hwmod omap36xx_uart4_hwmod = {
.prcm = {
.omap2 = {
.module_offs = OMAP3430_PER_MOD,
.prcm_reg_id = 1,
.module_bit = OMAP3630_EN_UART4_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3630_EN_UART4_SHIFT,
},
@ -546,8 +510,6 @@ static struct omap_hwmod am35xx_uart4_hwmod = {
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
.prcm_reg_id = 1,
.module_bit = AM35XX_EN_UART4_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = AM35XX_ST_UART4_SHIFT,
},
@ -583,11 +545,8 @@ static struct omap_hwmod omap3430es1_dss_core_hwmod = {
.main_clk = "dss1_alwon_fck", /* instead of dss_fck */
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_DSS1_SHIFT,
.module_offs = OMAP3430_DSS_MOD,
.idlest_reg_id = 1,
.idlest_stdby_bit = OMAP3430ES1_ST_DSS_SHIFT,
},
},
.opt_clks = dss_opt_clks,
@ -602,12 +561,9 @@ static struct omap_hwmod omap3xxx_dss_core_hwmod = {
.main_clk = "dss1_alwon_fck", /* instead of dss_fck */
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_DSS1_SHIFT,
.module_offs = OMAP3430_DSS_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430ES2_ST_DSS_IDLE_SHIFT,
.idlest_stdby_bit = OMAP3430ES2_ST_DSS_STDBY_SHIFT,
},
},
.opt_clks = dss_opt_clks,
@ -642,8 +598,6 @@ static struct omap_hwmod omap3xxx_dss_dispc_hwmod = {
.main_clk = "dss1_alwon_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_DSS1_SHIFT,
.module_offs = OMAP3430_DSS_MOD,
},
},
@ -683,8 +637,6 @@ static struct omap_hwmod omap3xxx_dss_dsi1_hwmod = {
.main_clk = "dss1_alwon_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_DSS1_SHIFT,
.module_offs = OMAP3430_DSS_MOD,
},
},
@ -703,8 +655,6 @@ static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = {
.main_clk = "dss1_alwon_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_DSS1_SHIFT,
.module_offs = OMAP3430_DSS_MOD,
},
},
@ -724,8 +674,6 @@ static struct omap_hwmod omap3xxx_dss_venc_hwmod = {
.main_clk = "dss_tv_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_DSS1_SHIFT,
.module_offs = OMAP3430_DSS_MOD,
},
},
@ -747,8 +695,6 @@ static struct omap_hwmod omap3xxx_i2c1_hwmod = {
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_I2C1_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_I2C1_SHIFT,
},
@ -770,8 +716,6 @@ static struct omap_hwmod omap3xxx_i2c2_hwmod = {
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_I2C2_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_I2C2_SHIFT,
},
@ -795,8 +739,6 @@ static struct omap_hwmod omap3xxx_i2c3_hwmod = {
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_I2C3_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_I2C3_SHIFT,
},
@ -846,8 +788,6 @@ static struct omap_hwmod omap3xxx_gpio1_hwmod = {
.opt_clks_cnt = ARRAY_SIZE(gpio1_opt_clks),
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_GPIO1_SHIFT,
.module_offs = WKUP_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_GPIO1_SHIFT,
@ -870,8 +810,6 @@ static struct omap_hwmod omap3xxx_gpio2_hwmod = {
.opt_clks_cnt = ARRAY_SIZE(gpio2_opt_clks),
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_GPIO2_SHIFT,
.module_offs = OMAP3430_PER_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_GPIO2_SHIFT,
@ -894,8 +832,6 @@ static struct omap_hwmod omap3xxx_gpio3_hwmod = {
.opt_clks_cnt = ARRAY_SIZE(gpio3_opt_clks),
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_GPIO3_SHIFT,
.module_offs = OMAP3430_PER_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_GPIO3_SHIFT,
@ -918,8 +854,6 @@ static struct omap_hwmod omap3xxx_gpio4_hwmod = {
.opt_clks_cnt = ARRAY_SIZE(gpio4_opt_clks),
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_GPIO4_SHIFT,
.module_offs = OMAP3430_PER_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_GPIO4_SHIFT,
@ -943,8 +877,6 @@ static struct omap_hwmod omap3xxx_gpio5_hwmod = {
.opt_clks_cnt = ARRAY_SIZE(gpio5_opt_clks),
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_GPIO5_SHIFT,
.module_offs = OMAP3430_PER_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_GPIO5_SHIFT,
@ -968,8 +900,6 @@ static struct omap_hwmod omap3xxx_gpio6_hwmod = {
.opt_clks_cnt = ARRAY_SIZE(gpio6_opt_clks),
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_GPIO6_SHIFT,
.module_offs = OMAP3430_PER_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_GPIO6_SHIFT,
@ -1012,8 +942,6 @@ static struct omap_hwmod omap3xxx_dma_system_hwmod = {
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
.prcm_reg_id = 1,
.module_bit = OMAP3430_ST_SDMA_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_SDMA_SHIFT,
},
@ -1060,8 +988,6 @@ static struct omap_hwmod omap3xxx_mcbsp1_hwmod = {
.main_clk = "mcbsp1_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_MCBSP1_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_MCBSP1_SHIFT,
@ -1083,8 +1009,6 @@ static struct omap_hwmod omap3xxx_mcbsp2_hwmod = {
.main_clk = "mcbsp2_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_MCBSP2_SHIFT,
.module_offs = OMAP3430_PER_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_MCBSP2_SHIFT,
@ -1107,8 +1031,6 @@ static struct omap_hwmod omap3xxx_mcbsp3_hwmod = {
.main_clk = "mcbsp3_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_MCBSP3_SHIFT,
.module_offs = OMAP3430_PER_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_MCBSP3_SHIFT,
@ -1128,8 +1050,6 @@ static struct omap_hwmod omap3xxx_mcbsp4_hwmod = {
.main_clk = "mcbsp4_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_MCBSP4_SHIFT,
.module_offs = OMAP3430_PER_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_MCBSP4_SHIFT,
@ -1148,8 +1068,6 @@ static struct omap_hwmod omap3xxx_mcbsp5_hwmod = {
.main_clk = "mcbsp5_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_MCBSP5_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_MCBSP5_SHIFT,
@ -1237,8 +1155,6 @@ static struct omap_hwmod omap34xx_sr1_hwmod = {
.main_clk = "sr1_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_SR1_SHIFT,
.module_offs = WKUP_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_EN_SR1_SHIFT,
@ -1254,8 +1170,6 @@ static struct omap_hwmod omap36xx_sr1_hwmod = {
.main_clk = "sr1_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_SR1_SHIFT,
.module_offs = WKUP_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_EN_SR1_SHIFT,
@ -1276,8 +1190,6 @@ static struct omap_hwmod omap34xx_sr2_hwmod = {
.main_clk = "sr2_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_SR2_SHIFT,
.module_offs = WKUP_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_EN_SR2_SHIFT,
@ -1293,8 +1205,6 @@ static struct omap_hwmod omap36xx_sr2_hwmod = {
.main_clk = "sr2_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_SR2_SHIFT,
.module_offs = WKUP_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_EN_SR2_SHIFT,
@ -1330,8 +1240,6 @@ static struct omap_hwmod omap3xxx_mailbox_hwmod = {
.main_clk = "mailboxes_ick",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_MAILBOXES_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_MAILBOXES_SHIFT,
@ -1373,8 +1281,6 @@ static struct omap_hwmod omap34xx_mcspi1 = {
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_MCSPI1_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_MCSPI1_SHIFT,
},
@ -1394,8 +1300,6 @@ static struct omap_hwmod omap34xx_mcspi2 = {
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_MCSPI2_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_MCSPI2_SHIFT,
},
@ -1417,8 +1321,6 @@ static struct omap_hwmod omap34xx_mcspi3 = {
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_MCSPI3_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_MCSPI3_SHIFT,
},
@ -1440,8 +1342,6 @@ static struct omap_hwmod omap34xx_mcspi4 = {
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_MCSPI4_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_MCSPI4_SHIFT,
},
@ -1475,12 +1375,9 @@ static struct omap_hwmod omap3xxx_usbhsotg_hwmod = {
.main_clk = "hsotgusb_ick",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_HSOTGUSB_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430ES2_ST_HSOTGUSB_IDLE_SHIFT,
.idlest_stdby_bit = OMAP3430ES2_ST_HSOTGUSB_STDBY_SHIFT,
},
},
.class = &usbotg_class,
@ -1555,8 +1452,6 @@ static struct omap_hwmod omap3xxx_pre_es3_mmc1_hwmod = {
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_MMC1_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_MMC1_SHIFT,
},
@ -1573,8 +1468,6 @@ static struct omap_hwmod omap3xxx_es3plus_mmc1_hwmod = {
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_MMC1_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_MMC1_SHIFT,
},
@ -1604,8 +1497,6 @@ static struct omap_hwmod omap3xxx_pre_es3_mmc2_hwmod = {
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_MMC2_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_MMC2_SHIFT,
},
@ -1622,8 +1513,6 @@ static struct omap_hwmod omap3xxx_es3plus_mmc2_hwmod = {
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_MMC2_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_MMC2_SHIFT,
},
@ -1647,8 +1536,6 @@ static struct omap_hwmod omap3xxx_mmc3_hwmod = {
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_MMC3_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_MMC3_SHIFT,
},
@ -1688,11 +1575,8 @@ static struct omap_hwmod omap3xxx_usb_host_hs_hwmod = {
.prcm = {
.omap2 = {
.module_offs = OMAP3430ES2_USBHOST_MOD,
.prcm_reg_id = 1,
.module_bit = OMAP3430ES2_EN_USBHOST1_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430ES2_ST_USBHOST_IDLE_SHIFT,
.idlest_stdby_bit = OMAP3430ES2_ST_USBHOST_STDBY_SHIFT,
},
},
@ -1766,8 +1650,6 @@ static struct omap_hwmod omap3xxx_usb_tll_hs_hwmod = {
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
.prcm_reg_id = 3,
.module_bit = OMAP3430ES2_EN_USBTLL_SHIFT,
.idlest_reg_id = 3,
.idlest_idle_bit = OMAP3430ES2_ST_USBTLL_SHIFT,
},
@ -1780,8 +1662,6 @@ static struct omap_hwmod omap3xxx_hdq1w_hwmod = {
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_HDQ_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_HDQ_SHIFT,
},
@ -1807,8 +1687,6 @@ static struct omap_hwmod omap3xxx_sad2d_hwmod = {
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_SAD2D_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_SAD2D_SHIFT,
},
@ -1842,8 +1720,6 @@ static struct omap_hwmod omap3xxx_counter_32k_hwmod = {
.prcm = {
.omap2 = {
.module_offs = WKUP_MOD,
.prcm_reg_id = 1,
.module_bit = OMAP3430_ST_32KSYNC_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_32KSYNC_SHIFT,
},
@ -2454,7 +2330,6 @@ static struct omap_hwmod omap3xxx_mmu_iva_hwmod = {
.prcm = {
.omap2 = {
.module_offs = OMAP3430_IVA2_MOD,
.module_bit = OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_IVA2_SHIFT,
},
@ -2760,8 +2635,6 @@ static struct omap_hwmod omap3xxx_sham_hwmod = {
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_SHA12_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_SHA12_SHIFT,
},
@ -2806,8 +2679,6 @@ static struct omap_hwmod omap3xxx_aes_hwmod = {
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_AES2_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430_ST_AES2_SHIFT,
},
@ -2850,8 +2721,6 @@ static struct omap_hwmod omap3xxx_ssi_hwmod = {
.main_clk = "ssi_ssr_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_SSI_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP3430ES2_ST_SSI_IDLE_SHIFT,

27
arch/arm/mach-omap2/omap_hwmod_7xx_data.c
View File

@ -4019,6 +4019,10 @@ static struct omap_hwmod_ocp_if *dra76x_hwmod_ocp_ifs[] __initdata = {
NULL,
};
static struct omap_hwmod_ocp_if *acd_76x_hwmod_ocp_ifs[] __initdata = {
NULL,
};
static struct omap_hwmod_ocp_if *dra74x_hwmod_ocp_ifs[] __initdata = {
&dra7xx_l4_per3__usb_otg_ss4,
NULL,
@ -4028,7 +4032,7 @@ static struct omap_hwmod_ocp_if *dra72x_hwmod_ocp_ifs[] __initdata = {
NULL,
};
static struct omap_hwmod_ocp_if *dra74x_dra72x_hwmod_ocp_ifs[] __initdata = {
static struct omap_hwmod_ocp_if *rtc_hwmod_ocp_ifs[] __initdata = {
&dra7xx_l4_per3__rtcss,
NULL,
};
@ -4040,19 +4044,26 @@ int __init dra7xx_hwmod_init(void)
omap_hwmod_init();
ret = omap_hwmod_register_links(dra7xx_hwmod_ocp_ifs);
if (!ret && soc_is_dra74x())
if (!ret && soc_is_dra74x()) {
ret = omap_hwmod_register_links(dra74x_hwmod_ocp_ifs);
else if (!ret && soc_is_dra72x())
if (!ret)
ret = omap_hwmod_register_links(rtc_hwmod_ocp_ifs);
} else if (!ret && soc_is_dra72x()) {
ret = omap_hwmod_register_links(dra72x_hwmod_ocp_ifs);
else if (!ret && soc_is_dra76x())
if (!ret && !of_machine_is_compatible("ti,dra718"))
ret = omap_hwmod_register_links(rtc_hwmod_ocp_ifs);
} else if (!ret && soc_is_dra76x()) {
ret = omap_hwmod_register_links(dra76x_hwmod_ocp_ifs);
if (!ret && soc_is_dra76x_acd()) {
ret = omap_hwmod_register_links(acd_76x_hwmod_ocp_ifs);
} else if (!ret && soc_is_dra76x_abz()) {
ret = omap_hwmod_register_links(rtc_hwmod_ocp_ifs);
}
}
if (!ret && omap_type() == OMAP2_DEVICE_TYPE_GP)
ret = omap_hwmod_register_links(dra7xx_gp_hwmod_ocp_ifs);
/* now for the IPs available only in dra74 and dra72 */
if (!ret && !of_machine_is_compatible("ti,dra718") && !soc_is_dra76x())
ret = omap_hwmod_register_links(dra74x_dra72x_hwmod_ocp_ifs);
return ret;
}

16
arch/arm/mach-omap2/soc.h
View File

@ -143,6 +143,14 @@ static inline int is_dra ##subclass (void) \
return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \
}
#define GET_DRA_PACKAGE (omap_rev() & 0xff)
#define IS_DRA_SUBCLASS_PACKAGE(subclass, package, id) \
static inline int is_dra ##subclass ##_ ##package (void) \
{ \
return (is_dra ##subclass () && GET_DRA_PACKAGE == id) ? 1 : 0; \
}
IS_OMAP_CLASS(24xx, 0x24)
IS_OMAP_CLASS(34xx, 0x34)
IS_OMAP_CLASS(44xx, 0x44)
@ -168,6 +176,8 @@ IS_TI_SUBCLASS(814x, 0x814)
IS_AM_SUBCLASS(335x, 0x335)
IS_AM_SUBCLASS(437x, 0x437)
IS_DRA_SUBCLASS(76x, 0x76)
IS_DRA_SUBCLASS_PACKAGE(76x, abz, 2)
IS_DRA_SUBCLASS_PACKAGE(76x, acd, 3)
IS_DRA_SUBCLASS(75x, 0x75)
IS_DRA_SUBCLASS(72x, 0x72)
@ -317,10 +327,14 @@ IS_OMAP_TYPE(3430, 0x3430)
#if defined(CONFIG_SOC_DRA7XX)
#undef soc_is_dra7xx
#undef soc_is_dra76x
#undef soc_is_dra76x_abz
#undef soc_is_dra76x_acd
#undef soc_is_dra74x
#undef soc_is_dra72x
#define soc_is_dra7xx() is_dra7xx()
#define soc_is_dra76x() is_dra76x()
#define soc_is_dra76x_abz() is_dra76x_abz()
#define soc_is_dra76x_acd() is_dra76x_acd()
#define soc_is_dra74x() is_dra75x()
#define soc_is_dra72x() is_dra72x()
#endif
@ -391,6 +405,8 @@ IS_OMAP_TYPE(3430, 0x3430)
#define DRA7XX_CLASS 0x07000000
#define DRA762_REV_ES1_0 (DRA7XX_CLASS | (0x62 << 16) | (0x10 << 8))
#define DRA762_ABZ_REV_ES1_0 (DRA762_REV_ES1_0 | (2 << 0))
#define DRA762_ACD_REV_ES1_0 (DRA762_REV_ES1_0 | (3 << 0))
#define DRA752_REV_ES1_0 (DRA7XX_CLASS | (0x52 << 16) | (0x10 << 8))
#define DRA752_REV_ES1_1 (DRA7XX_CLASS | (0x52 << 16) | (0x11 << 8))
#define DRA752_REV_ES2_0 (DRA7XX_CLASS | (0x52 << 16) | (0x20 << 8))

1
arch/arm/mach-pxa/Kconfig
View File

@ -40,6 +40,7 @@ config MACH_PXA3XX_DT
config ARCH_LUBBOCK
bool "Intel DBPXA250 Development Platform (aka Lubbock)"
select GPIO_REG
select PXA25x
select SA1111

2
arch/arm/mach-pxa/balloon3.c
View File

@ -28,7 +28,7 @@
#include <linux/mtd/partitions.h>
#include <linux/types.h>
#include <linux/platform_data/pcf857x.h>
#include <linux/i2c/pxa-i2c.h>
#include <linux/platform_data/i2c-pxa.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/physmap.h>
#include <linux/regulator/max1586.h>

2
arch/arm/mach-pxa/cm-x300.c
View File

@ -31,7 +31,7 @@
#include <linux/i2c.h>
#include <linux/platform_data/pca953x.h>
#include <linux/i2c/pxa-i2c.h>
#include <linux/platform_data/i2c-pxa.h>
#include <linux/mfd/da903x.h>
#include <linux/regulator/machine.h>

2
arch/arm/mach-pxa/colibri-evalboard.c
View File

@ -19,7 +19,7 @@
#include <mach/hardware.h>
#include <asm/mach/arch.h>
#include <linux/i2c.h>
#include <linux/i2c/pxa-i2c.h>
#include <linux/platform_data/i2c-pxa.h>
#include <asm/io.h>
#include "pxa27x.h"

2
arch/arm/mach-pxa/colibri-pxa270-income.c
View File

@ -23,7 +23,7 @@
#include <linux/platform_device.h>
#include <linux/pwm.h>
#include <linux/pwm_backlight.h>
#include <linux/i2c/pxa-i2c.h>
#include <linux/platform_data/i2c-pxa.h>
#include <asm/irq.h>
#include <asm/mach-types.h>

33
arch/arm/mach-pxa/corgi.c
View File

@ -26,7 +26,7 @@
#include <linux/gpio.h>
#include <linux/backlight.h>
#include <linux/i2c.h>
#include <linux/i2c/pxa-i2c.h>
#include <linux/platform_data/i2c-pxa.h>
#include <linux/io.h>
#include <linux/regulator/machine.h>
#include <linux/spi/spi.h>
@ -606,24 +606,6 @@ static void __init corgi_init_spi(void)
static inline void corgi_init_spi(void) {}
#endif
static struct mtd_partition sharpsl_nand_partitions[] = {
{
.name = "System Area",
.offset = 0,
.size = 7 * 1024 * 1024,
},
{
.name = "Root Filesystem",
.offset = 7 * 1024 * 1024,
.size = 25 * 1024 * 1024,
},
{
.name = "Home Filesystem",
.offset = MTDPART_OFS_APPEND,
.size = MTDPART_SIZ_FULL,
},
};
static uint8_t scan_ff_pattern[] = { 0xff, 0xff };
static struct nand_bbt_descr sharpsl_bbt = {
@ -633,10 +615,16 @@ static struct nand_bbt_descr sharpsl_bbt = {
.pattern = scan_ff_pattern
};
static const char * const probes[] = {
"cmdlinepart",
"ofpart",
"sharpslpart",
NULL,
};
static struct sharpsl_nand_platform_data sharpsl_nand_platform_data = {
.badblock_pattern = &sharpsl_bbt,
.partitions = sharpsl_nand_partitions,
.nr_partitions = ARRAY_SIZE(sharpsl_nand_partitions),
.part_parsers = probes,
};
static struct resource sharpsl_nand_resources[] = {
@ -750,9 +738,6 @@ static void __init corgi_init(void)
platform_scoop_config = &corgi_pcmcia_config;
if (machine_is_husky())
sharpsl_nand_partitions[1].size = 53 * 1024 * 1024;
platform_add_devices(devices, ARRAY_SIZE(devices));
regulator_has_full_constraints();

2
arch/arm/mach-pxa/csb726.c
View File

@ -17,7 +17,7 @@
#include <linux/mtd/partitions.h>
#include <linux/sm501.h>
#include <linux/smsc911x.h>
#include <linux/i2c/pxa-i2c.h>
#include <linux/platform_data/i2c-pxa.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>

2
arch/arm/mach-pxa/devices.c
View File

@ -5,7 +5,7 @@
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
#include <linux/spi/pxa2xx_spi.h>
#include <linux/i2c/pxa-i2c.h>
#include <linux/platform_data/i2c-pxa.h>
#include "udc.h"
#include <linux/platform_data/usb-pxa3xx-ulpi.h>

9
arch/arm/mach-pxa/devices.h
View File

@ -56,3 +56,12 @@ extern struct platform_device pxa93x_device_gpio;
void __init pxa_register_device(struct platform_device *dev, void *data);
void __init pxa2xx_set_dmac_info(int nb_channels, int nb_requestors);
struct i2c_pxa_platform_data;
extern void pxa_set_i2c_info(struct i2c_pxa_platform_data *info);
#ifdef CONFIG_PXA27x
extern void pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info);
#endif
#ifdef CONFIG_PXA3xx
extern void pxa3xx_set_i2c_power_info(struct i2c_pxa_platform_data *info);
#endif

2
arch/arm/mach-pxa/em-x270.c
View File

@ -32,7 +32,7 @@
#include <linux/apm-emulation.h>
#include <linux/i2c.h>
#include <linux/platform_data/pca953x.h>
#include <linux/i2c/pxa-i2c.h>
#include <linux/platform_data/i2c-pxa.h>
#include <linux/regulator/userspace-consumer.h>
#include <asm/mach-types.h>

2
arch/arm/mach-pxa/ezx.c
View File

@ -23,7 +23,7 @@
#include <linux/gpio.h>
#include <linux/gpio_keys.h>
#include <linux/leds-lp3944.h>
#include <linux/i2c/pxa-i2c.h>
#include <linux/platform_data/i2c-pxa.h>
#include <asm/setup.h>
#include <asm/mach-types.h>

2
arch/arm/mach-pxa/hx4700.c
View File

@ -38,7 +38,7 @@
#include <linux/spi/spi.h>
#include <linux/spi/pxa2xx_spi.h>
#include <linux/usb/gpio_vbus.h>
#include <linux/i2c/pxa-i2c.h>
#include <linux/platform_data/i2c-pxa.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>

3
arch/arm/mach-pxa/littleton.c
View File

@ -28,7 +28,7 @@
#include <linux/leds.h>
#include <linux/mfd/da903x.h>
#include <linux/platform_data/max732x.h>
#include <linux/i2c/pxa-i2c.h>
#include <linux/platform_data/i2c-pxa.h>
#include <asm/types.h>
#include <asm/setup.h>
@ -42,6 +42,7 @@
#include <asm/mach/irq.h>
#include "pxa300.h"
#include "devices.h"
#include <linux/platform_data/video-pxafb.h>
#include <linux/platform_data/mmc-pxamci.h>
#include <linux/platform_data/keypad-pxa27x.h>

24
arch/arm/mach-pxa/lubbock.c
View File

@ -13,6 +13,7 @@
*/
#include <linux/clkdev.h>
#include <linux/gpio.h>
#include <linux/gpio/gpio-reg.h>
#include <linux/gpio/machine.h>
#include <linux/module.h>
#include <linux/kernel.h>
@ -110,20 +111,18 @@ static unsigned long lubbock_pin_config[] __initdata = {
};
#define LUB_HEXLED __LUB_REG(LUBBOCK_FPGA_PHYS + 0x010)
#define LUB_MISC_WR __LUB_REG(LUBBOCK_FPGA_PHYS + 0x080)
void lubbock_set_hexled(uint32_t value)
{
LUB_HEXLED = value;
}
static struct gpio_chip *lubbock_misc_wr_gc;
void lubbock_set_misc_wr(unsigned int mask, unsigned int set)
{
unsigned long flags;
local_irq_save(flags);
LUB_MISC_WR = (LUB_MISC_WR & ~mask) | (set & mask);
local_irq_restore(flags);
unsigned long m = mask, v = set;
lubbock_misc_wr_gc->set_multiple(lubbock_misc_wr_gc, &m, &v);
}
EXPORT_SYMBOL(lubbock_set_misc_wr);
@ -452,9 +451,9 @@ static void lubbock_irda_transceiver_mode(struct device *dev, int mode)
local_irq_save(flags);
if (mode & IR_SIRMODE) {
LUB_MISC_WR &= ~(1 << 4);
lubbock_set_misc_wr(BIT(4), 0);
} else if (mode & IR_FIRMODE) {
LUB_MISC_WR |= 1 << 4;
lubbock_set_misc_wr(BIT(4), BIT(4));
}
pxa2xx_transceiver_mode(dev, mode);
local_irq_restore(flags);
@ -472,6 +471,15 @@ static void __init lubbock_init(void)
pxa2xx_mfp_config(ARRAY_AND_SIZE(lubbock_pin_config));
lubbock_misc_wr_gc = gpio_reg_init(NULL, (void *)&LUB_MISC_WR,
-1, 16, "lubbock", 0, LUB_MISC_WR,
NULL, NULL, NULL);
if (IS_ERR(lubbock_misc_wr_gc)) {
pr_err("Lubbock: unable to register lubbock GPIOs: %ld\n",
PTR_ERR(lubbock_misc_wr_gc));
lubbock_misc_wr_gc = NULL;
}
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);

2
arch/arm/mach-pxa/magician.c
View File

@ -31,7 +31,7 @@
#include <linux/regulator/gpio-regulator.h>
#include <linux/regulator/machine.h>
#include <linux/usb/gpio_vbus.h>
#include <linux/i2c/pxa-i2c.h>
#include <linux/platform_data/i2c-pxa.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>

2
arch/arm/mach-pxa/mainstone.c
View File

@ -29,7 +29,7 @@
#include <linux/pwm.h>
#include <linux/pwm_backlight.h>
#include <linux/smc91x.h>
#include <linux/i2c/pxa-i2c.h>
#include <linux/platform_data/i2c-pxa.h>
#include <linux/slab.h>
#include <linux/leds.h>

2
arch/arm/mach-pxa/mioa701.c
View File

@ -42,7 +42,7 @@
#include <linux/regulator/fixed.h>
#include <linux/regulator/max1586.h>
#include <linux/slab.h>
#include <linux/i2c/pxa-i2c.h>
#include <linux/platform_data/i2c-pxa.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>

2
arch/arm/mach-pxa/mxm8x10.c
View File

@ -22,7 +22,7 @@
#include <linux/serial_8250.h>
#include <linux/dm9000.h>
#include <linux/gpio.h>
#include <linux/i2c/pxa-i2c.h>
#include <linux/platform_data/i2c-pxa.h>
#include <linux/platform_data/mtd-nand-pxa3xx.h>

2
arch/arm/mach-pxa/palm27x.c
View File

@ -22,7 +22,7 @@
#include <linux/power_supply.h>
#include <linux/usb/gpio_vbus.h>
#include <linux/regulator/max1586.h>
#include <linux/i2c/pxa-i2c.h>
#include <linux/platform_data/i2c-pxa.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>

2
arch/arm/mach-pxa/pcm990-baseboard.c
View File

@ -23,7 +23,7 @@
#include <linux/irq.h>
#include <linux/platform_device.h>
#include <linux/i2c.h>
#include <linux/i2c/pxa-i2c.h>
#include <linux/platform_data/i2c-pxa.h>
#include <linux/pwm.h>
#include <linux/pwm_backlight.h>

30
arch/arm/mach-pxa/poodle.c
View File

@ -24,7 +24,7 @@
#include <linux/mtd/physmap.h>
#include <linux/gpio.h>
#include <linux/i2c.h>
#include <linux/i2c/pxa-i2c.h>
#include <linux/platform_data/i2c-pxa.h>
#include <linux/regulator/machine.h>
#include <linux/spi/spi.h>
#include <linux/spi/ads7846.h>
@ -333,24 +333,6 @@ static struct pxafb_mach_info poodle_fb_info = {
.lcd_conn = LCD_COLOR_TFT_16BPP,
};
static struct mtd_partition sharpsl_nand_partitions[] = {
{
.name = "System Area",
.offset = 0,
.size = 7 * 1024 * 1024,
},
{
.name = "Root Filesystem",
.offset = 7 * 1024 * 1024,
.size = 22 * 1024 * 1024,
},
{
.name = "Home Filesystem",
.offset = MTDPART_OFS_APPEND,
.size = MTDPART_SIZ_FULL,
},
};
static uint8_t scan_ff_pattern[] = { 0xff, 0xff };
static struct nand_bbt_descr sharpsl_bbt = {
@ -360,10 +342,16 @@ static struct nand_bbt_descr sharpsl_bbt = {
.pattern = scan_ff_pattern
};
static const char * const probes[] = {
"cmdlinepart",
"ofpart",
"sharpslpart",
NULL,
};
static struct sharpsl_nand_platform_data sharpsl_nand_platform_data = {
.badblock_pattern = &sharpsl_bbt,
.partitions = sharpsl_nand_partitions,
.nr_partitions = ARRAY_SIZE(sharpsl_nand_partitions),
.part_parsers = probes,
};
static struct resource sharpsl_nand_resources[] = {

2
arch/arm/mach-pxa/pxa27x.c
View File

@ -22,7 +22,7 @@
#include <linux/syscore_ops.h>
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/i2c/pxa-i2c.h>
#include <linux/platform_data/i2c-pxa.h>
#include <asm/mach/map.h>
#include <mach/hardware.h>

2
arch/arm/mach-pxa/pxa3xx.c
View File

@ -23,7 +23,7 @@
#include <linux/io.h>
#include <linux/of.h>
#include <linux/syscore_ops.h>
#include <linux/i2c/pxa-i2c.h>
#include <linux/platform_data/i2c-pxa.h>
#include <asm/mach/map.h>
#include <asm/suspend.h>

2
arch/arm/mach-pxa/raumfeld.c
View File

@ -32,7 +32,7 @@
#include <linux/pwm.h>
#include <linux/pwm_backlight.h>
#include <linux/i2c.h>
#include <linux/i2c/pxa-i2c.h>
#include <linux/platform_data/i2c-pxa.h>
#include <linux/spi/spi.h>
#include <linux/spi/spi_gpio.h>
#include <linux/lis3lv02d.h>

2
arch/arm/mach-pxa/saar.c
View File

@ -20,7 +20,7 @@
#include <linux/delay.h>
#include <linux/fb.h>
#include <linux/i2c.h>
#include <linux/i2c/pxa-i2c.h>
#include <linux/platform_data/i2c-pxa.h>
#include <linux/smc91x.h>
#include <linux/mfd/da903x.h>
#include <linux/mtd/mtd.h>

36
arch/arm/mach-pxa/spitz.c
View File

@ -20,7 +20,7 @@
#include <linux/gpio.h>
#include <linux/leds.h>
#include <linux/i2c.h>
#include <linux/i2c/pxa-i2c.h>
#include <linux/platform_data/i2c-pxa.h>
#include <linux/platform_data/pca953x.h>
#include <linux/spi/spi.h>
#include <linux/spi/ads7846.h>
@ -739,21 +739,6 @@ static inline void spitz_lcd_init(void) {}
* NAND Flash
******************************************************************************/
#if defined(CONFIG_MTD_NAND_SHARPSL) || defined(CONFIG_MTD_NAND_SHARPSL_MODULE)
static struct mtd_partition spitz_nand_partitions[] = {
{
.name = "System Area",
.offset = 0,
.size = 7 * 1024 * 1024,
}, {
.name = "Root Filesystem",
.offset = 7 * 1024 * 1024,
}, {
.name = "Home Filesystem",
.offset = MTDPART_OFS_APPEND,
.size = MTDPART_SIZ_FULL,
},
};
static uint8_t scan_ff_pattern[] = { 0xff, 0xff };
static struct nand_bbt_descr spitz_nand_bbt = {
@ -808,10 +793,16 @@ static const struct mtd_ooblayout_ops akita_ooblayout_ops = {
.free = akita_ooblayout_free,
};
static const char * const probes[] = {
"cmdlinepart",
"ofpart",
"sharpslpart",
NULL,
};
static struct sharpsl_nand_platform_data spitz_nand_pdata = {
.badblock_pattern = &spitz_nand_bbt,
.partitions = spitz_nand_partitions,
.nr_partitions = ARRAY_SIZE(spitz_nand_partitions),
.part_parsers = probes,
};
static struct resource spitz_nand_resources[] = {
@ -834,14 +825,7 @@ static struct platform_device spitz_nand_device = {
static void __init spitz_nand_init(void)
{
if (machine_is_spitz()) {
spitz_nand_partitions[1].size = 5 * 1024 * 1024;
} else if (machine_is_akita()) {
spitz_nand_partitions[1].size = 58 * 1024 * 1024;
spitz_nand_bbt.len = 1;
spitz_nand_pdata.ecc_layout = &akita_ooblayout_ops;
} else if (machine_is_borzoi()) {
spitz_nand_partitions[1].size = 32 * 1024 * 1024;
if (machine_is_akita() || machine_is_borzoi()) {
spitz_nand_bbt.len = 1;
spitz_nand_pdata.ecc_layout = &akita_ooblayout_ops;
}

2
arch/arm/mach-pxa/stargate2.c
View File

@ -25,7 +25,7 @@
#include <linux/mtd/plat-ram.h>
#include <linux/mtd/partitions.h>
#include <linux/i2c/pxa-i2c.h>
#include <linux/platform_data/i2c-pxa.h>
#include <linux/platform_data/pcf857x.h>
#include <linux/platform_data/at24.h>
#include <linux/smc91x.h>

4
arch/arm/mach-pxa/tosa-bt.c
View File

@ -132,3 +132,7 @@ static struct platform_driver tosa_bt_driver = {
},
};
module_platform_driver(tosa_bt_driver);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Dmitry Baryshkov");
MODULE_DESCRIPTION("Bluetooth built-in chip control");

30
arch/arm/mach-pxa/tosa.c
View File

@ -35,7 +35,7 @@
#include <linux/spi/spi.h>
#include <linux/spi/pxa2xx_spi.h>
#include <linux/input/matrix_keypad.h>
#include <linux/i2c/pxa-i2c.h>
#include <linux/platform_data/i2c-pxa.h>
#include <linux/usb/gpio_vbus.h>
#include <linux/reboot.h>
#include <linux/memblock.h>
@ -673,24 +673,6 @@ static int tosa_tc6393xb_suspend(struct platform_device *dev)
return 0;
}
static struct mtd_partition tosa_nand_partition[] = {
{
.name = "smf",
.offset = 0,
.size = 7 * 1024 * 1024,
},
{
.name = "root",
.offset = MTDPART_OFS_APPEND,
.size = 28 * 1024 * 1024,
},
{
.name = "home",
.offset = MTDPART_OFS_APPEND,
.size = MTDPART_SIZ_FULL,
},
};
static uint8_t scan_ff_pattern[] = { 0xff, 0xff };
static struct nand_bbt_descr tosa_tc6393xb_nand_bbt = {
@ -700,10 +682,16 @@ static struct nand_bbt_descr tosa_tc6393xb_nand_bbt = {
.pattern = scan_ff_pattern
};
static const char * const probes[] = {
"cmdlinepart",
"ofpart",
"sharpslpart",
NULL,
};
static struct tmio_nand_data tosa_tc6393xb_nand_config = {
.num_partitions = ARRAY_SIZE(tosa_nand_partition),
.partition = tosa_nand_partition,
.badblock_pattern = &tosa_tc6393xb_nand_bbt,
.part_parsers = probes,
};
static int tosa_tc6393xb_setup(struct platform_device *dev)

2
arch/arm/mach-pxa/trizeps4.c
View File

@ -28,7 +28,7 @@
#include <linux/mtd/physmap.h>
#include <linux/mtd/partitions.h>
#include <linux/regulator/machine.h>
#include <linux/i2c/pxa-i2c.h>
#include <linux/platform_data/i2c-pxa.h>
#include <asm/types.h>
#include <asm/setup.h>

2
arch/arm/mach-pxa/viper.c
View File

@ -37,7 +37,7 @@
#include <linux/jiffies.h>
#include <linux/i2c-gpio.h>
#include <linux/gpio/machine.h>
#include <linux/i2c/pxa-i2c.h>
#include <linux/platform_data/i2c-pxa.h>
#include <linux/serial_8250.h>
#include <linux/smc91x.h>
#include <linux/pwm.h>

2
arch/arm/mach-pxa/vpac270.c
View File

@ -27,7 +27,7 @@
#include <linux/ata_platform.h>
#include <linux/regulator/machine.h>
#include <linux/regulator/max1586.h>
#include <linux/i2c/pxa-i2c.h>
#include <linux/platform_data/i2c-pxa.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>

3
arch/arm/mach-pxa/xcep.c
View File

@ -16,7 +16,7 @@
#include <linux/platform_device.h>
#include <linux/i2c.h>
#include <linux/i2c/pxa-i2c.h>
#include <linux/platform_data/i2c-pxa.h>
#include <linux/smc91x.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
@ -32,6 +32,7 @@
#include <mach/smemc.h>
#include "generic.h"
#include "devices.h"
#define XCEP_ETH_PHYS (PXA_CS3_PHYS + 0x00000300)
#define XCEP_ETH_PHYS_END (PXA_CS3_PHYS + 0x000fffff)

2
arch/arm/mach-pxa/z2.c
View File

@ -30,7 +30,7 @@
#include <linux/gpio_keys.h>
#include <linux/delay.h>
#include <linux/regulator/machine.h>
#include <linux/i2c/pxa-i2c.h>
#include <linux/platform_data/i2c-pxa.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>

3
arch/arm/mach-pxa/zeus.c
View File

@ -26,7 +26,7 @@
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/i2c.h>
#include <linux/i2c/pxa-i2c.h>
#include <linux/platform_data/i2c-pxa.h>
#include <linux/platform_data/pca953x.h>
#include <linux/apm-emulation.h>
#include <linux/can/platform/mcp251x.h>
@ -40,6 +40,7 @@
#include <asm/mach/map.h>
#include "pxa27x.h"
#include "devices.h"
#include <mach/regs-uart.h>
#include <linux/platform_data/usb-ohci-pxa27x.h>
#include <linux/platform_data/mmc-pxamci.h>

3
arch/arm/mach-pxa/zylonite_pxa300.c
View File

@ -17,11 +17,12 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/i2c.h>
#include <linux/i2c/pxa-i2c.h>
#include <linux/platform_data/i2c-pxa.h>
#include <linux/platform_data/pca953x.h>
#include <linux/gpio.h>
#include "pxa300.h"
#include "devices.h"
#include "zylonite.h"
#include "generic.h"

4
arch/arm/mach-s3c24xx/Kconfig
View File

@ -1,11 +1,9 @@
# arch/arm/mach-s3c24xx/Kconfig
# SPDX-License-Identifier: GPL-2.0
#
# Copyright (c) 2012 Samsung Electronics Co., Ltd.
# http://www.samsung.com/
#
# Copyright 2007 Simtec Electronics
#
# Licensed under GPLv2
if ARCH_S3C24XX

4
arch/arm/mach-s3c24xx/Makefile
View File

@ -1,11 +1,9 @@
# arch/arm/mach-s3c24xx/Makefile
# SPDX-License-Identifier: GPL-2.0
#
# Copyright (c) 2012 Samsung Electronics Co., Ltd.
# http://www.samsung.com/
#
# Copyright 2007 Simtec Electronics
#
# Licensed under GPLv2
# core

2
arch/arm/mach-s3c24xx/Makefile.boot
View File

@ -1,3 +1,5 @@
# SPDX-License-Identifier: GPL-2.0
ifeq ($(CONFIG_PM_H1940),y)
zreladdr-y += 0x30108000
params_phys-y := 0x30100100

7
arch/arm/mach-s3c24xx/anubis.h
View File

@ -1,3 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (c) 2005 Simtec Electronics
* http://www.simtec.co.uk/products/
@ -6,11 +7,7 @@
* ANUBIS - CPLD control constants
* ANUBIS - IRQ Number definitions
* ANUBIS - Memory map definitions
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
*/
#ifndef __MACH_S3C24XX_ANUBIS_H
#define __MACH_S3C24XX_ANUBIS_H __FILE__

17
arch/arm/mach-s3c24xx/bast-ide.c
View File

@ -1,14 +1,9 @@
/* linux/arch/arm/mach-s3c2410/bast-ide.c
*
* Copyright 2007 Simtec Electronics
* http://www.simtec.co.uk/products/EB2410ITX/
* http://armlinux.simtec.co.uk/
* Ben Dooks <ben@simtec.co.uk>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
// SPDX-License-Identifier: GPL-2.0
//
// Copyright 2007 Simtec Electronics
// http://www.simtec.co.uk/products/EB2410ITX/
// http://armlinux.simtec.co.uk/
// Ben Dooks <ben@simtec.co.uk>
#include <linux/kernel.h>
#include <linux/types.h>

28
arch/arm/mach-s3c24xx/bast-irq.c
View File

@ -1,25 +1,9 @@
/* linux/arch/arm/mach-s3c2410/bast-irq.c
*
* Copyright 2003-2005 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* http://www.simtec.co.uk/products/EB2410ITX/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright 2003-2005 Simtec Electronics
// Ben Dooks <ben@simtec.co.uk>
//
// http://www.simtec.co.uk/products/EB2410ITX/
#include <linux/init.h>
#include <linux/module.h>

7
arch/arm/mach-s3c24xx/bast.h
View File

@ -1,3 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (c) 2003-2004 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
@ -5,11 +6,7 @@
* BAST - CPLD control constants
* BAST - IRQ Number definitions
* BAST - Memory map definitions
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
*/
#ifndef __MACH_S3C24XX_BAST_H
#define __MACH_S3C24XX_BAST_H __FILE__

21
arch/arm/mach-s3c24xx/common-smdk.c
View File

@ -1,16 +1,11 @@
/* linux/arch/arm/plat-s3c24xx/common-smdk.c
*
* Copyright (c) 2006 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* Common code for SMDK2410 and SMDK2440 boards
*
* http://www.fluff.org/ben/smdk2440/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
// SPDX-License-Identifier: GPL-2.0
//
// Copyright (c) 2006 Simtec Electronics
// Ben Dooks <ben@simtec.co.uk>
//
// Common code for SMDK2410 and SMDK2440 boards
//
// http://www.fluff.org/ben/smdk2440/
#include <linux/kernel.h>
#include <linux/types.h>

7
arch/arm/mach-s3c24xx/common-smdk.h
View File

@ -1,3 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (c) 2006 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
@ -5,10 +6,6 @@
* Common code for SMDK2410 and SMDK2440 boards
*
* http://www.fluff.org/ben/smdk2440/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
*/
extern void smdk_machine_init(void);

29
arch/arm/mach-s3c24xx/common.c
View File

@ -1,25 +1,10 @@
/* linux/arch/arm/plat-s3c24xx/cpu.c
*
* Copyright (c) 2004-2005 Simtec Electronics
* http://www.simtec.co.uk/products/SWLINUX/
* Ben Dooks <ben@simtec.co.uk>
*
* Common code for S3C24XX machines
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright (c) 2004-2005 Simtec Electronics
// http://www.simtec.co.uk/products/SWLINUX/
// Ben Dooks <ben@simtec.co.uk>
//
// Common code for S3C24XX machines
#include <linux/dma-mapping.h>
#include <linux/init.h>

Some files were not shown because too many files have changed in this diff Show More