arm64: dts: rockchip: add more rk3399 iommu nodes
Add VPU/VDEC/IEP/ISP0/ISP1 iommu nodes Signed-off-by: Simon Xue <xxm@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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@ -1175,6 +1175,33 @@ pwm3: pwm@ff420030 {
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status = "disabled";
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};
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vpu_mmu: iommu@ff650800 {
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compatible = "rockchip,iommu";
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reg = <0x0 0xff650800 0x0 0x40>;
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interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH 0>;
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interrupt-names = "vpu_mmu";
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#iommu-cells = <0>;
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status = "disabled";
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};
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vdec_mmu: iommu@ff660480 {
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compatible = "rockchip,iommu";
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reg = <0x0 0xff660480 0x0 0x40>, <0x0 0xff6604c0 0x0 0x40>;
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interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH 0>;
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interrupt-names = "vdec_mmu";
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#iommu-cells = <0>;
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status = "disabled";
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};
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iep_mmu: iommu@ff670800 {
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compatible = "rockchip,iommu";
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reg = <0x0 0xff670800 0x0 0x40>;
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interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH 0>;
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interrupt-names = "iep_mmu";
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#iommu-cells = <0>;
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status = "disabled";
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};
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efuse0: efuse@ff690000 {
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compatible = "rockchip,rk3399-efuse";
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reg = <0x0 0xff690000 0x0 0x80>;
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@ -1548,6 +1575,26 @@ vopb_mmu: iommu@ff903f00 {
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status = "disabled";
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};
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isp0_mmu: iommu@ff914000 {
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compatible = "rockchip,iommu";
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reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>;
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interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH 0>;
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interrupt-names = "isp0_mmu";
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#iommu-cells = <0>;
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rockchip,disable-mmu-reset;
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status = "disabled";
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};
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isp1_mmu: iommu@ff924000 {
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compatible = "rockchip,iommu";
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reg = <0x0 0xff924000 0x0 0x100>, <0x0 0xff925000 0x0 0x100>;
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interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH 0>;
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interrupt-names = "isp1_mmu";
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#iommu-cells = <0>;
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rockchip,disable-mmu-reset;
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status = "disabled";
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};
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hdmi: hdmi@ff940000 {
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compatible = "rockchip,rk3399-dw-hdmi";
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reg = <0x0 0xff940000 0x0 0x20000>;
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