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ARM: dts: imx27: Place the usb phy nodes in the board dts files 

It is not a good approach to have the USB PHY nodes inside imx27.dtsi since
the USB PHYs on mx27 are not internal to the SoC.

Place the USB PHY nodes in the board dts files instead.

Also, each board may have a different clock source for the USB PHY, so do not
hardcode it.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This commit is contained in:
Fabio Estevam 2014-04-16 14:53:19 -03:00 committed by Shawn Guo
parent b67b19447e
commit af38a00378
3 changed files with 30 additions and 30 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

19
arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
View File

@ -37,6 +37,20 @@ timing0: 240x320 {
};
};
};
usbphy {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
usbphy2: usbphy@2 {
compatible = "usb-nop-xceiv";
reg = <0>;
vcc-supply = <&reg_5v0>;
clocks = <&clks 0>;
clock-names = "main_clk";
};
};
};
&cspi1 {
@ -268,14 +282,11 @@ &usbh2 {
dr_mode = "host";
phy_type = "ulpi";
vbus-supply = <&reg_5v0>;
fsl,usbphy = <&usbphy2>;
disable-over-current;
status = "okay";
};
&usbphy2 {
vcc-supply = <&reg_5v0>;
};
&weim {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_weim>;

19
arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi
View File

@ -41,6 +41,20 @@ reg_5v0: regulator@1 {
regulator-max-microvolt = <5000000>;
};
};
usbphy {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
usbphy0: usbphy@0 {
compatible = "usb-nop-xceiv";
reg = <0>;
vcc-supply = <&sw3_reg>;
clocks = <&clks 0>;
clock-names = "main_clk";
};
};
};
&audmux {
@ -307,14 +321,11 @@ &usbotg {
pinctrl-0 = <&pinctrl_usbotg>;
dr_mode = "otg";
phy_type = "ulpi";
fsl,usbphy = <&usbphy0>;
vbus-supply = <&sw3_reg>;
status = "okay";
};
&usbphy0 {
vcc-supply = <&sw3_reg>;
};
&weim {
status = "okay";

22
arch/arm/boot/dts/imx27.dtsi
View File

@ -72,26 +72,6 @@ cpu: cpu@0 {
};
};
usbphy {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
usbphy0: usbphy@0 {
compatible = "usb-nop-xceiv";
reg = <0>;
clocks = <&clks 75>;
clock-names = "main_clk";
};
usbphy2: usbphy@2 {
compatible = "usb-nop-xceiv";
reg = <2>;
clocks = <&clks 75>;
clock-names = "main_clk";
};
};
soc {
#address-cells = <1>;
#size-cells = <1>;
@ -467,7 +447,6 @@ usbotg: usb@10024000 {
interrupts = <56>;
clocks = <&clks 75>;
fsl,usbmisc = <&usbmisc 0>;
fsl,usbphy = <&usbphy0>;
status = "disabled";
};
@ -486,7 +465,6 @@ usbh2: usb@10024400 {
interrupts = <55>;
clocks = <&clks 75>;
fsl,usbmisc = <&usbmisc 2>;
fsl,usbphy = <&usbphy2>;
status = "disabled";
};