p71924506
/
linux_old1
1
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

Merge branch 'net-sparx5-refactor-based-on-feedback-on' 

Casper Andersson says:

====================
net: sparx5: Refactor based on feedback on

This is a follow up to a previous patch that was merged
before manufacturer could give feedback. This addresses
the feedback. See link below for previous patch series.
https://lore.kernel.org/netdev/20220322081823.wqbx7vud4q7qtjuq@wse-c0155/T/#t
====================

Link: https://lore.kernel.org/r/20220324113853.576803-1-casper.casan@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Jakub Kicinski 2022-03-25 15:45:16 -07:00
parent feb13dcb18 ad238fc6de
commit afec4980dc
5 changed files with 24 additions and 47 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

19
drivers/net/ethernet/microchip/sparx5/sparx5_mactable.c
View File

@ -212,19 +212,7 @@ bool sparx5_mact_find(struct sparx5 *sparx5,
mutex_unlock(&sparx5->lock);
return ret == 0;
}
static int sparx5_mact_lookup(struct sparx5 *sparx5,
const unsigned char mac[ETH_ALEN],
u16 vid)
{
u32 pcfg2;
if (sparx5_mact_find(sparx5, mac, vid, &pcfg2))
return 1;
return 0;
return ret;
}
int sparx5_mact_forget(struct sparx5 *sparx5,
@ -305,9 +293,10 @@ int sparx5_add_mact_entry(struct sparx5 *sparx5,
{
struct sparx5_mact_entry *mact_entry;
int ret;
u32 cfg2;
ret = sparx5_mact_lookup(sparx5, addr, vid);
if (ret)
ret = sparx5_mact_find(sparx5, addr, vid, &cfg2);
if (!ret)
return 0;
/* In case the entry already exists, don't add it again to SW,

7
drivers/net/ethernet/microchip/sparx5/sparx5_main.h
View File

@ -65,13 +65,10 @@ enum sparx5_vlan_port_type {
#define PGID_IPV6_MC_CTRL (PGID_BASE + 5)
#define PGID_BCAST (PGID_BASE + 6)
#define PGID_CPU (PGID_BASE + 7)
#define PGID_MCAST_START (PGID_BASE + 8)
#define PGID_TABLE_SIZE 3290
#define PGID_MCAST_START 65
#define PGID_GLAG_START 833
#define PGID_GLAG_END 1088
#define IFH_LEN 9 /* 36 bytes */
#define NULL_VID 0
#define SPX5_MACT_PULL_DELAY (2 * HZ)
@ -328,6 +325,7 @@ void sparx5_mact_init(struct sparx5 *sparx5);
/* sparx5_vlan.c */
void sparx5_pgid_update_mask(struct sparx5_port *port, int pgid, bool enable);
void sparx5_pgid_read_mask(struct sparx5 *sparx5, int pgid, u32 portmask[3]);
void sparx5_update_fwd(struct sparx5 *sparx5);
void sparx5_vlan_init(struct sparx5 *sparx5);
void sparx5_vlan_port_setup(struct sparx5 *sparx5, int portno);
@ -374,7 +372,6 @@ enum sparx5_pgid_type {
SPX5_PGID_FREE,
SPX5_PGID_RESERVED,
SPX5_PGID_MULTICAST,
SPX5_PGID_GLAG
};
void sparx5_pgid_init(struct sparx5 *spx5);

20
drivers/net/ethernet/microchip/sparx5/sparx5_pgid.c
View File

@ -15,28 +15,14 @@ void sparx5_pgid_init(struct sparx5 *spx5)
spx5->pgid_map[i] = SPX5_PGID_RESERVED;
}
int sparx5_pgid_alloc_glag(struct sparx5 *spx5, u16 *idx)
{
int i;
for (i = PGID_GLAG_START; i <= PGID_GLAG_END; i++)
if (spx5->pgid_map[i] == SPX5_PGID_FREE) {
spx5->pgid_map[i] = SPX5_PGID_GLAG;
*idx = i;
return 0;
}
return -EBUSY;
}
int sparx5_pgid_alloc_mcast(struct sparx5 *spx5, u16 *idx)
{
int i;
/* The multicast area starts at index 65, but the first 7
* are reserved for flood masks and CPU. Start alloc after that.
*/
for (i = PGID_MCAST_START; i < PGID_TABLE_SIZE; i++) {
if (i == PGID_GLAG_START)
i = PGID_GLAG_END + 1;
if (spx5->pgid_map[i] == SPX5_PGID_FREE) {
spx5->pgid_map[i] = SPX5_PGID_MULTICAST;
*idx = i;

18
drivers/net/ethernet/microchip/sparx5/sparx5_switchdev.c
View File

@ -406,11 +406,11 @@ static int sparx5_handle_port_mdb_add(struct net_device *dev,
res = sparx5_mact_find(spx5, v->addr, vid, &mact_entry);
if (res) {
if (res == 0) {
pgid_idx = LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_ADDR_GET(mact_entry);
/* MC_IDX has an offset of 65 in the PGID table. */
pgid_idx += PGID_MCAST_START;
/* MC_IDX starts after the port masks in the PGID table */
pgid_idx += SPX5_PORTS;
sparx5_pgid_update_mask(port, pgid_idx, true);
} else {
err = sparx5_pgid_alloc_mcast(spx5, &pgid_idx);
@ -468,17 +468,15 @@ static int sparx5_handle_port_mdb_del(struct net_device *dev,
res = sparx5_mact_find(spx5, v->addr, vid, &mact_entry);
if (res) {
if (res == 0) {
pgid_idx = LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_ADDR_GET(mact_entry);
/* MC_IDX has an offset of 65 in the PGID table. */
pgid_idx += PGID_MCAST_START;
/* MC_IDX starts after the port masks in the PGID table */
pgid_idx += SPX5_PORTS;
sparx5_pgid_update_mask(port, pgid_idx, false);
pgid_entry[0] = spx5_rd(spx5, ANA_AC_PGID_CFG(pgid_idx));
pgid_entry[1] = spx5_rd(spx5, ANA_AC_PGID_CFG1(pgid_idx));
pgid_entry[2] = spx5_rd(spx5, ANA_AC_PGID_CFG2(pgid_idx));
if (pgid_entry[0] == 0 && pgid_entry[1] == 0 && pgid_entry[2] == 0) {
sparx5_pgid_read_mask(spx5, pgid_idx, pgid_entry);
if (bitmap_empty((unsigned long *)pgid_entry, SPX5_PORTS)) {
/* No ports are in MC group. Remove entry */
err = sparx5_mdb_del_entry(dev, spx5, v->addr, vid, pgid_idx);
if (err)

7
drivers/net/ethernet/microchip/sparx5/sparx5_vlan.c
View File

@ -138,6 +138,13 @@ void sparx5_pgid_update_mask(struct sparx5_port *port, int pgid, bool enable)
}
}
void sparx5_pgid_read_mask(struct sparx5 *spx5, int pgid, u32 portmask[3])
{
portmask[0] = spx5_rd(spx5, ANA_AC_PGID_CFG(pgid));
portmask[1] = spx5_rd(spx5, ANA_AC_PGID_CFG1(pgid));
portmask[2] = spx5_rd(spx5, ANA_AC_PGID_CFG2(pgid));
}
void sparx5_update_fwd(struct sparx5 *sparx5)
{
DECLARE_BITMAP(workmask, SPX5_PORTS);