drm/amd/dal: Add POLARIS12 support (v2)
v2: agd: squash in dm fix, rebase Signed-off-by: Jordan Lazare <Jordan.Lazare@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1235,6 +1235,7 @@ int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev)
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case CHIP_STONEY:
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case CHIP_POLARIS11:
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case CHIP_POLARIS10:
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case CHIP_POLARIS12:
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if (dce110_register_irq_handlers(dm->adev)) {
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DRM_ERROR("DM: Failed to initialize IRQ\n");
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return -1;
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@ -1472,6 +1473,7 @@ static int dm_early_init(void *handle)
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adev->mode_info.num_dig = 9;
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break;
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case CHIP_POLARIS11:
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case CHIP_POLARIS12:
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adev->mode_info.num_crtc = 5;
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adev->mode_info.num_hpd = 5;
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adev->mode_info.num_dig = 5;
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@ -60,7 +60,8 @@ enum dce_version resource_parse_asic_id(struct hw_asic_id asic_id)
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break;
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}
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if (ASIC_REV_IS_POLARIS10_P(asic_id.hw_internal_rev) ||
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ASIC_REV_IS_POLARIS11_M(asic_id.hw_internal_rev)) {
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ASIC_REV_IS_POLARIS11_M(asic_id.hw_internal_rev) ||
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ASIC_REV_IS_POLARIS12_V(asic_id.hw_internal_rev)) {
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dc_version = DCE_VERSION_11_2;
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}
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break;
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@ -1233,7 +1233,8 @@ static void bw_calcs_data_update_from_pplib(struct core_dc *dc)
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const struct resource_caps *dce112_resource_cap(
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struct hw_asic_id *asic_id)
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{
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if (ASIC_REV_IS_POLARIS11_M(asic_id->hw_internal_rev))
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if (ASIC_REV_IS_POLARIS11_M(asic_id->hw_internal_rev) ||
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ASIC_REV_IS_POLARIS12_V(asic_id->hw_internal_rev))
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return &polaris_11_resource_cap;
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else
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return &polaris_10_resource_cap;
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@ -85,6 +85,7 @@
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/* DCE112 */
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#define VI_POLARIS10_P_A0 80
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#define VI_POLARIS11_M_A0 90
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#define VI_POLARIS12_V_A0 100
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#define VI_UNKNOWN 0xFF
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@ -95,7 +96,9 @@
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#define ASIC_REV_IS_POLARIS10_P(eChipRev) ((eChipRev >= VI_POLARIS10_P_A0) && \
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(eChipRev < VI_POLARIS11_M_A0))
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#define ASIC_REV_IS_POLARIS11_M(eChipRev) (eChipRev >= VI_POLARIS11_M_A0)
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#define ASIC_REV_IS_POLARIS11_M(eChipRev) ((eChipRev >= VI_POLARIS11_M_A0) && \
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(eChipRev < VI_POLARIS12_V_A0))
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#define ASIC_REV_IS_POLARIS12_V(eChipRev) (eChipRev >= VI_POLARIS12_V_A0)
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/* DCE11 */
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#define CZ_CARRIZO_A0 0x01
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