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ARM: dts: imx6: Do not hardcode the CLKO clock 

Using "IMX6QDL_CLK_CKO" for the clock is easier to read instead of
the hardcoded clock number.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Fabio Estevam 2016-04-26 22:28:29 -03:00 committed by Shawn Guo
parent b18f909376
commit b26a68c1fb
15 changed files with 15 additions and 15 deletions
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2
arch/arm/boot/dts/imx6dl-riotboard.dts
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@ -114,7 +114,7 @@ &i2c1 {
codec: sgtl5000@0a { codec: sgtl5000@0a {
compatible = "fsl,sgtl5000"; compatible = "fsl,sgtl5000";
reg = <0x0a>; reg = <0x0a>;
clocks = <&clks 201>; clocks = <&clks IMX6QDL_CLK_CKO>;
VDDA-supply = <&reg_2p5v>; VDDA-supply = <&reg_2p5v>;
VDDIO-supply = <&reg_3p3v>; VDDIO-supply = <&reg_3p3v>;
}; };

2
arch/arm/boot/dts/imx6q-gw5400-a.dts
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@ -327,7 +327,7 @@ accelerometer: mma8450@1c {
codec: sgtl5000@0a { codec: sgtl5000@0a {
compatible = "fsl,sgtl5000"; compatible = "fsl,sgtl5000";
reg = <0x0a>; reg = <0x0a>;
clocks = <&clks 201>; clocks = <&clks IMX6QDL_CLK_CKO>;
VDDA-supply = <&sw4_reg>; VDDA-supply = <&sw4_reg>;
VDDIO-supply = <&reg_3p3v>; VDDIO-supply = <&reg_3p3v>;
}; };

2
arch/arm/boot/dts/imx6q-tbs2910.dts
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@ -159,7 +159,7 @@ &i2c1 {
status = "okay"; status = "okay";
sgtl5000: sgtl5000@0a { sgtl5000: sgtl5000@0a {
clocks = <&clks 201>; clocks = <&clks IMX6QDL_CLK_CKO>;
compatible = "fsl,sgtl5000"; compatible = "fsl,sgtl5000";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sgtl5000>; pinctrl-0 = <&pinctrl_sgtl5000>;

2
arch/arm/boot/dts/imx6qdl-apalis.dtsi
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@ -324,7 +324,7 @@ vgen6_reg: vgen6 {
codec: sgtl5000@0a { codec: sgtl5000@0a {
compatible = "fsl,sgtl5000"; compatible = "fsl,sgtl5000";
reg = <0x0a>; reg = <0x0a>;
clocks = <&clks 201>; clocks = <&clks IMX6QDL_CLK_CKO>;
VDDA-supply = <&reg_2p5v>; VDDA-supply = <&reg_2p5v>;
VDDIO-supply = <&reg_3p3v>; VDDIO-supply = <&reg_3p3v>;
}; };

2
arch/arm/boot/dts/imx6qdl-apf6dev.dtsi
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@ -213,7 +213,7 @@ &i2c2 {
codec: sgtl5000@0a { codec: sgtl5000@0a {
compatible = "fsl,sgtl5000"; compatible = "fsl,sgtl5000";
reg = <0x0a>; reg = <0x0a>;
clocks = <&clks 201>; clocks = <&clks IMX6QDL_CLK_CKO>;
VDDA-supply = <&reg_3p3v>; VDDA-supply = <&reg_3p3v>;
VDDIO-supply = <&reg_3p3v>; VDDIO-supply = <&reg_3p3v>;
}; };

2
arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
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@ -244,7 +244,7 @@ &i2c3 {
codec: sgtl5000@0a { codec: sgtl5000@0a {
compatible = "fsl,sgtl5000"; compatible = "fsl,sgtl5000";
reg = <0x0a>; reg = <0x0a>;
clocks = <&clks 201>; clocks = <&clks IMX6QDL_CLK_CKO>;
VDDA-supply = <&reg_1p8v>; VDDA-supply = <&reg_1p8v>;
VDDIO-supply = <&reg_3p3v>; VDDIO-supply = <&reg_3p3v>;
}; };

2
arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
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@ -237,7 +237,7 @@ &i2c3 {
codec: sgtl5000@0a { codec: sgtl5000@0a {
compatible = "fsl,sgtl5000"; compatible = "fsl,sgtl5000";
reg = <0x0a>; reg = <0x0a>;
clocks = <&clks 201>; clocks = <&clks IMX6QDL_CLK_CKO>;
VDDA-supply = <&reg_1p8v>; VDDA-supply = <&reg_1p8v>;
VDDIO-supply = <&reg_3p3v>; VDDIO-supply = <&reg_3p3v>;
}; };

2
arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
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@ -328,7 +328,7 @@ &i2c3 {
codec: sgtl5000@0a { codec: sgtl5000@0a {
compatible = "fsl,sgtl5000"; compatible = "fsl,sgtl5000";
reg = <0x0a>; reg = <0x0a>;
clocks = <&clks 201>; clocks = <&clks IMX6QDL_CLK_CKO>;
VDDA-supply = <&sw4_reg>; VDDA-supply = <&sw4_reg>;
VDDIO-supply = <&reg_3p3v>; VDDIO-supply = <&reg_3p3v>;
}; };

2
arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi
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@ -269,7 +269,7 @@ codec: sgtl5000@0a {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sgtl5000>; pinctrl-0 = <&pinctrl_sgtl5000>;
reg = <0x0a>; reg = <0x0a>;
clocks = <&clks 201>; clocks = <&clks IMX6QDL_CLK_CKO>;
VDDA-supply = <&reg_2p5v>; VDDA-supply = <&reg_2p5v>;
VDDIO-supply = <&reg_3p3v>; VDDIO-supply = <&reg_3p3v>;
}; };

2
arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi
View File

@ -402,7 +402,7 @@ &i2c1 {
codec: sgtl5000@0a { codec: sgtl5000@0a {
compatible = "fsl,sgtl5000"; compatible = "fsl,sgtl5000";
reg = <0x0a>; reg = <0x0a>;
clocks = <&clks 201>; clocks = <&clks IMX6QDL_CLK_CKO>;
VDDA-supply = <&reg_2p5v>; VDDA-supply = <&reg_2p5v>;
VDDIO-supply = <&reg_3p3v>; VDDIO-supply = <&reg_3p3v>;
}; };

2
arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
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@ -304,7 +304,7 @@ &i2c1 {
codec: sgtl5000@0a { codec: sgtl5000@0a {
compatible = "fsl,sgtl5000"; compatible = "fsl,sgtl5000";
reg = <0x0a>; reg = <0x0a>;
clocks = <&clks 201>; clocks = <&clks IMX6QDL_CLK_CKO>;
VDDA-supply = <&reg_2p5v>; VDDA-supply = <&reg_2p5v>;
VDDIO-supply = <&reg_3p3v>; VDDIO-supply = <&reg_3p3v>;
}; };

2
arch/arm/boot/dts/imx6qdl-rex.dtsi
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@ -126,7 +126,7 @@ &i2c1 {
codec: sgtl5000@0a { codec: sgtl5000@0a {
compatible = "fsl,sgtl5000"; compatible = "fsl,sgtl5000";
reg = <0x0a>; reg = <0x0a>;
clocks = <&clks 201>; clocks = <&clks IMX6QDL_CLK_CKO>;
VDDA-supply = <&reg_3p3v>; VDDA-supply = <&reg_3p3v>;
VDDIO-supply = <&reg_3p3v>; VDDIO-supply = <&reg_3p3v>;
}; };

2
arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
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@ -290,7 +290,7 @@ &i2c1 {
codec: sgtl5000@0a { codec: sgtl5000@0a {
compatible = "fsl,sgtl5000"; compatible = "fsl,sgtl5000";
reg = <0x0a>; reg = <0x0a>;
clocks = <&clks 201>; clocks = <&clks IMX6QDL_CLK_CKO>;
VDDA-supply = <&reg_2p5v>; VDDA-supply = <&reg_2p5v>;
VDDIO-supply = <&reg_3p3v>; VDDIO-supply = <&reg_3p3v>;
}; };

2
arch/arm/boot/dts/imx6qdl-udoo.dtsi
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@ -260,7 +260,7 @@ &usbh1 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbh>; pinctrl-0 = <&pinctrl_usbh>;
vbus-supply = <&reg_usb_h1_vbus>; vbus-supply = <&reg_usb_h1_vbus>;
clocks = <&clks 201>; clocks = <&clks IMX6QDL_CLK_CKO>;
status = "okay"; status = "okay";
}; };

2
arch/arm/boot/dts/imx6qdl-wandboard.dtsi
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@ -85,7 +85,7 @@ &i2c2 {
codec: sgtl5000@0a { codec: sgtl5000@0a {
compatible = "fsl,sgtl5000"; compatible = "fsl,sgtl5000";
reg = <0x0a>; reg = <0x0a>;
clocks = <&clks 201>; clocks = <&clks IMX6QDL_CLK_CKO>;
VDDA-supply = <&reg_2p5v>; VDDA-supply = <&reg_2p5v>;
VDDIO-supply = <&reg_3p3v>; VDDIO-supply = <&reg_3p3v>;
}; };