usb: dwc2: Add dwc2_core_reset()
dwc2_core_reset() was previously renamed to dwc2_core_reset_and_dr_force_mode(). Now add back dwc2_core_reset() which performs only a basic core reset without forcing the mode. Signed-off-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
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@ -481,11 +481,10 @@ static void dwc2_init_fs_ls_pclk_sel(struct dwc2_hsotg *hsotg)
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* Do core a soft reset of the core. Be careful with this because it
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* resets all the internal state machines of the core.
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*/
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int dwc2_core_reset_and_force_dr_mode(struct dwc2_hsotg *hsotg)
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int dwc2_core_reset(struct dwc2_hsotg *hsotg)
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{
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u32 greset;
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int count = 0;
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u32 gusbcfg;
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dev_vdbg(hsotg->dev, "%s()\n", __func__);
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@ -517,6 +516,25 @@ int dwc2_core_reset_and_force_dr_mode(struct dwc2_hsotg *hsotg)
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}
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} while (!(greset & GRSTCTL_AHBIDLE));
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return 0;
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}
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/*
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* Do core a soft reset of the core. Be careful with this because it
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* resets all the internal state machines of the core.
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*
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* Additionally this will apply force mode as per the hsotg->dr_mode
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* parameter.
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*/
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int dwc2_core_reset_and_force_dr_mode(struct dwc2_hsotg *hsotg)
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{
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int retval;
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u32 gusbcfg;
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retval = dwc2_core_reset(hsotg);
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if (retval)
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return retval;
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if (hsotg->dr_mode == USB_DR_MODE_HOST) {
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gusbcfg = dwc2_readl(hsotg->regs + GUSBCFG);
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gusbcfg &= ~GUSBCFG_FORCEDEVMODE;
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@ -880,6 +880,7 @@ enum dwc2_halt_status {
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* The following functions support initialization of the core driver component
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* and the DWC_otg controller
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*/
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extern int dwc2_core_reset(struct dwc2_hsotg *hsotg);
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extern int dwc2_core_reset_and_force_dr_mode(struct dwc2_hsotg *hsotg);
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extern void dwc2_core_host_init(struct dwc2_hsotg *hsotg);
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extern int dwc2_enter_hibernation(struct dwc2_hsotg *hsotg);
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