Revert "dts: socfpga: Add DTS entry for adding the stmmac glue layer for stmmac."
This reverts commit 7e0b4cd062
.
The binding changes need to be done differently as well, let's
take them through netdev, and merge the dts changes in a new
patch here.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
parent
57a0ec3840
commit
b80a6373d6
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@ -1,35 +0,0 @@
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Altera SOCFPGA SoC DWMAC controller
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The device node has following properties.
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Required properties:
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- compatible : Should contain "altr,socfpga-stmmac"
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- altr,sysmgr-syscon : Should be the phandle to the system manager node that
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encompasses the glue register, and the register offset.
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Sub-nodes:
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The dwmac core should be added as subnode to SOCFPGA dwmac glue.
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- dwmac : The binding details of dwmac can be found in
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Documentation/devicetree/bindings/net/stmmac.txt
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Example:
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ethernet0: ethernet0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "altr,socfpga-stmmac";
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altr,sysmgr-syscon = <&sysmgr 0x60>;
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status = "disabled";
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ranges;
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gmac0: gmac0@ff700000 {
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compatible = "snps,dwmac-3.70a", "snps,dwmac";
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reg = <0xff700000 0x2000>;
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interrupts = <0 115 4>;
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interrupt-names = "macirq";
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mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */
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clocks = <&emac0_clk>;
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clock-names = "stmmaceth";
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};
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};
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@ -450,43 +450,26 @@ qspi_clk: qspi_clk {
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};
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};
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ethernet0: ethernet0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "altr,socfpga-stmmac";
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altr,sysmgr-syscon = <&sysmgr 0x60>;
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gmac0: ethernet@ff700000 {
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compatible = "altr,socfpga-stmmac", "snps,dwmac-3.70a", "snps,dwmac";
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reg = <0xff700000 0x2000>;
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interrupts = <0 115 4>;
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interrupt-names = "macirq";
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mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */
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clocks = <&emac0_clk>;
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clock-names = "stmmaceth";
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status = "disabled";
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ranges;
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gmac0: gmac0@ff700000 {
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compatible = "snps,dwmac-3.70a", "snps,dwmac";
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reg = <0xff700000 0x2000>;
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interrupts = <0 115 4>;
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interrupt-names = "macirq";
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mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */
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clocks = <&emac0_clk>;
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clock-names = "stmmaceth";
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};
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};
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ethernet1: ethernet1 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "altr,socfpga-stmmac";
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altr,sysmgr-syscon = <&sysmgr 0x60>;
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gmac1: ethernet@ff702000 {
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compatible = "altr,socfpga-stmmac", "snps,dwmac-3.70a", "snps,dwmac";
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reg = <0xff702000 0x2000>;
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interrupts = <0 120 4>;
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interrupt-names = "macirq";
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mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */
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clocks = <&emac1_clk>;
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clock-names = "stmmaceth";
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status = "disabled";
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ranges;
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gmac1: gmac1@ff702000 {
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device_type = "network";
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compatible = "snps,dwmac-3.70a", "snps,dwmac";
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reg = <0xff702000 0x2000>;
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interrupts = <0 120 4>;
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interrupt-names = "macirq";
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mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */
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clocks = <&emac1_clk>;
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clock-names = "stmmaceth";
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};
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};
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L2: l2-cache@fffef000 {
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@ -37,28 +37,4 @@ aliases {
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*/
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ethernet0 = &gmac1;
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};
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aliases {
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/* this allow the ethaddr uboot environmnet variable contents
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* to be added to the gmac1 device tree blob.
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*/
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ethernet0 = &gmac1;
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};
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};
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ðernet1 {
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status = "okay";
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};
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&gmac1 {
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phy-mode = "rgmii";
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rxd0-skew-ps = <0>;
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rxd1-skew-ps = <0>;
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rxd2-skew-ps = <0>;
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rxd3-skew-ps = <0>;
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txen-skew-ps = <0>;
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txc-skew-ps = <2600>;
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rxdv-skew-ps = <0>;
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rxc-skew-ps = <2000>;
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};
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@ -38,20 +38,3 @@ aliases {
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ethernet0 = &gmac1;
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};
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};
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ðernet1 {
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status = "okay";
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};
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&gmac1 {
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phy-mode = "rgmii";
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rxd0-skew-ps = <0>;
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rxd1-skew-ps = <0>;
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rxd2-skew-ps = <0>;
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rxd3-skew-ps = <0>;
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txen-skew-ps = <0>;
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txc-skew-ps = <2600>;
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rxdv-skew-ps = <0>;
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rxc-skew-ps = <2000>;
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};
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@ -30,28 +30,8 @@ memory {
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device_type = "memory";
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reg = <0x0 0x40000000>; /* 1GB */
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};
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aliases {
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/* this allow the ethaddr uboot environmnet variable contents
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* to be added to the gmac1 device tree blob.
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*/
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ethernet0 = &gmac1;
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};
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};
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ðernet1 {
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status = "okay";
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};
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&gmac1 {
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phy-mode = "rgmii";
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rxd0-skew-ps = <0>;
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rxd1-skew-ps = <0>;
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rxd2-skew-ps = <0>;
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rxd3-skew-ps = <0>;
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txen-skew-ps = <0>;
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txc-skew-ps = <2600>;
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rxdv-skew-ps = <0>;
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rxc-skew-ps = <2000>;
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status = "okay";
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};
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@ -86,11 +86,3 @@ sysmgr@ffd08000 {
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};
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};
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};
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ðernet0 {
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status = "okay";
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};
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&gmac0 {
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phy-mode = "gmii";
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};
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