PCI: xilinx-nwl: Translate INTx range to hwirqs 0-3
The devicetree binding documentation for the Xilinx NWL PCIe root port bridge shows an example which uses an interrupt-map property to map PCI INTx interrupts to hardware IRQ numbers 1-4. The driver creates an IRQ domain with size 4, which therefore covers the hwirq range 0-3. This means that if we attempt to make use of the INTD interrupt then we're likely to hit a WARN() in irq_domain_associate() because INTD, or hwirw=4, is outside of the range covered by the IRQ domain. irq_domain_associate() will then return -EINVAL and we'll be unable to make use of INTD. Fix this by making use of the pci_irqd_intx_xlate() helper function to translate the 1-4 range used in the DT to a 0-3 range used within the driver, and stop adding 1 to decoded hwirq numbers. Whilst cleaning up INTx handling we make use of the new PCI_NUM_INTX macro & drop the custom INTX definitions. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: "Sören Brinkmann" <soren.brinkmann@xilinx.com>
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@ -133,7 +133,6 @@
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#define CFG_DMA_REG_BAR GENMASK(2, 0)
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#define INT_PCI_MSI_NR (2 * 32)
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#define INTX_NUM 4
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/* Readin the PS_LINKUP */
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#define PS_LINKUP_OFFSET 0x00000238
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@ -334,9 +333,8 @@ static void nwl_pcie_leg_handler(struct irq_desc *desc)
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while ((status = nwl_bridge_readl(pcie, MSGF_LEG_STATUS) &
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MSGF_LEG_SR_MASKALL) != 0) {
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for_each_set_bit(bit, &status, INTX_NUM) {
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virq = irq_find_mapping(pcie->legacy_irq_domain,
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bit + 1);
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for_each_set_bit(bit, &status, PCI_NUM_INTX) {
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virq = irq_find_mapping(pcie->legacy_irq_domain, bit);
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if (virq)
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generic_handle_irq(virq);
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}
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@ -436,6 +434,7 @@ static int nwl_legacy_map(struct irq_domain *domain, unsigned int irq,
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static const struct irq_domain_ops legacy_domain_ops = {
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.map = nwl_legacy_map,
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.xlate = pci_irqd_intx_xlate,
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};
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#ifdef CONFIG_PCI_MSI
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@ -559,7 +558,7 @@ static int nwl_pcie_init_irq_domain(struct nwl_pcie *pcie)
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}
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pcie->legacy_irq_domain = irq_domain_add_linear(legacy_intc_node,
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INTX_NUM,
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PCI_NUM_INTX,
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&legacy_domain_ops,
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pcie);
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