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MIPS: Add CPU identifiers and probing for Cavium CN73xx and CNF75xx processors. 

Add new processor identifiers for Cavium CN73xx and CNF75xx
processors, and probe for them in cpu-probe.c

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/12311/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
David Daney 2016-02-01 14:43:41 -08:00 committed by Ralf Baechle
parent 34ae8e3688
commit b8c8f66507
2 changed files with 4 additions and 0 deletions
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2
arch/mips/include/asm/cpu.h
View File

@ -169,6 +169,8 @@
#define PRID_IMP_CAVIUM_CNF71XX 0x9400
#define PRID_IMP_CAVIUM_CN78XX 0x9500
#define PRID_IMP_CAVIUM_CN70XX 0x9600
#define PRID_IMP_CAVIUM_CN73XX 0x9700
#define PRID_IMP_CAVIUM_CNF75XX 0x9800
/*
* These are the PRID's for when 23:16 == PRID_COMP_INGENIC_*

2
arch/mips/kernel/cpu-probe.c
View File

@ -1481,6 +1481,8 @@ static inline void cpu_probe_cavium(struct cpuinfo_mips *c, unsigned int cpu)
set_elf_platform(cpu, "octeon2");
break;
case PRID_IMP_CAVIUM_CN70XX:
case PRID_IMP_CAVIUM_CN73XX:
case PRID_IMP_CAVIUM_CNF75XX:
case PRID_IMP_CAVIUM_CN78XX:
c->cputype = CPU_CAVIUM_OCTEON3;
__cpu_name[cpu] = "Cavium Octeon III";