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Second Round of Renesas ARM Based SoC Cleanup for v4.6 

* Remove stale comment from Kconfig
 * Consolidate SCU mapping code
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Merge tag 'renesas-cleanup2-for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/cleanup

Merge "Second Round of Renesas ARM Based SoC Cleanup for v4.6" from Simon Horman:

* Remove stale comment from Kconfig
* Consolidate SCU mapping code

* tag 'renesas-cleanup2-for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: Kconfig: Get rid of old comment
  ARM: shmobile: Consolidate SCU mapping code
This commit is contained in:
Arnd Bergmann 2016-02-26 22:37:32 +01:00
parent 797bc81398 cf77db5165
commit b8d56b61af
9 changed files with 30 additions and 34 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/mach-shmobile/Kconfig
View File

@ -99,6 +99,4 @@ config ARCH_SH73A0
bool "SH-Mobile AG5 (R8A73A00)"
select ARCH_RMOBILE
select RENESAS_INTC_IRQPIN
comment "Renesas ARM SoCs System Configuration"
endif

6
arch/arm/mach-shmobile/common.h
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@ -4,7 +4,6 @@
extern void shmobile_init_delay(void);
extern void shmobile_boot_vector(void);
extern unsigned long shmobile_boot_fn;
extern unsigned long shmobile_boot_arg;
extern unsigned long shmobile_boot_size;
extern void shmobile_smp_boot(void);
extern void shmobile_smp_sleep(void);
@ -12,7 +11,8 @@ extern void shmobile_smp_hook(unsigned int cpu, unsigned long fn,
unsigned long arg);
extern bool shmobile_smp_cpu_can_disable(unsigned int cpu);
extern void shmobile_boot_scu(void);
extern void shmobile_smp_scu_prepare_cpus(unsigned int max_cpus);
extern void shmobile_smp_scu_prepare_cpus(phys_addr_t scu_base_phys,
unsigned int max_cpus);
extern void shmobile_smp_scu_cpu_die(unsigned int cpu);
extern int shmobile_smp_scu_cpu_kill(unsigned int cpu);
extern struct platform_suspend_ops shmobile_suspend_ops;
@ -31,8 +31,6 @@ int shmobile_cpufreq_init(void);
static inline int shmobile_cpufreq_init(void) { return 0; }
#endif
extern void __iomem *shmobile_scu_base;
static inline void __init shmobile_init_late(void)
{
shmobile_suspend_init();

6
arch/arm/mach-shmobile/headsmp-scu.S
View File

@ -38,9 +38,3 @@ ENTRY(shmobile_boot_scu)
b secondary_startup
ENDPROC(shmobile_boot_scu)
.text
.align 2
.globl shmobile_scu_base
shmobile_scu_base:
.space 4

28
arch/arm/mach-shmobile/headsmp.S
View File

@ -24,7 +24,6 @@
.arm
.align 12
ENTRY(shmobile_boot_vector)
ldr r0, 2f
ldr r1, 1f
bx r1
@ -34,9 +33,6 @@ ENDPROC(shmobile_boot_vector)
.globl shmobile_boot_fn
shmobile_boot_fn:
1: .space 4
.globl shmobile_boot_arg
shmobile_boot_arg:
2: .space 4
.globl shmobile_boot_size
shmobile_boot_size:
.long . - shmobile_boot_vector
@ -46,13 +42,15 @@ shmobile_boot_size:
*/
ENTRY(shmobile_smp_boot)
@ r0 = MPIDR_HWID_BITMASK
mrc p15, 0, r1, c0, c0, 5 @ r1 = MPIDR
and r0, r1, r0 @ r0 = cpu_logical_map() value
and r0, r1, #0xffffff @ MPIDR_HWID_BITMASK
@ r0 = cpu_logical_map() value
mov r1, #0 @ r1 = CPU index
adr r5, 1f @ array of per-cpu mpidr values
adr r6, 2f @ array of per-cpu functions
adr r7, 3f @ array of per-cpu arguments
adr r2, 1f
ldmia r2, {r5, r6, r7}
add r5, r5, r2 @ array of per-cpu mpidr values
add r6, r6, r2 @ array of per-cpu functions
add r7, r7, r2 @ array of per-cpu arguments
shmobile_smp_boot_find_mpidr:
ldr r8, [r5, r1, lsl #2]
@ -80,12 +78,18 @@ ENTRY(shmobile_smp_sleep)
b shmobile_smp_boot
ENDPROC(shmobile_smp_sleep)
.align 2
1: .long shmobile_smp_mpidr - .
.long shmobile_smp_fn - 1b
.long shmobile_smp_arg - 1b
.bss
.globl shmobile_smp_mpidr
shmobile_smp_mpidr:
1: .space NR_CPUS * 4
.space NR_CPUS * 4
.globl shmobile_smp_fn
shmobile_smp_fn:
2: .space NR_CPUS * 4
.space NR_CPUS * 4
.globl shmobile_smp_arg
shmobile_smp_arg:
3: .space NR_CPUS * 4
.space NR_CPUS * 4

1
arch/arm/mach-shmobile/platsmp-apmu.c
View File

@ -123,7 +123,6 @@ void __init shmobile_smp_apmu_prepare_cpus(unsigned int max_cpus,
{
/* install boot code shared by all CPUs */
shmobile_boot_fn = virt_to_phys(shmobile_smp_boot);
shmobile_boot_arg = MPIDR_HWID_BITMASK;
/* perform per-cpu setup */
apmu_parse_cfg(apmu_init_cpu, apmu_config, num);

12
arch/arm/mach-shmobile/platsmp-scu.c
View File

@ -17,6 +17,10 @@
#include <asm/smp_scu.h>
#include "common.h"
static phys_addr_t shmobile_scu_base_phys;
static void __iomem *shmobile_scu_base;
static int shmobile_smp_scu_notifier_call(struct notifier_block *nfb,
unsigned long action, void *hcpu)
{
@ -26,7 +30,7 @@ static int shmobile_smp_scu_notifier_call(struct notifier_block *nfb,
case CPU_UP_PREPARE:
/* For this particular CPU register SCU SMP boot vector */
shmobile_smp_hook(cpu, virt_to_phys(shmobile_boot_scu),
(unsigned long)shmobile_scu_base);
shmobile_scu_base_phys);
break;
};
@ -37,13 +41,15 @@ static struct notifier_block shmobile_smp_scu_notifier = {
.notifier_call = shmobile_smp_scu_notifier_call,
};
void __init shmobile_smp_scu_prepare_cpus(unsigned int max_cpus)
void __init shmobile_smp_scu_prepare_cpus(phys_addr_t scu_base_phys,
unsigned int max_cpus)
{
/* install boot code shared by all CPUs */
shmobile_boot_fn = virt_to_phys(shmobile_smp_boot);
shmobile_boot_arg = MPIDR_HWID_BITMASK;
/* enable SCU and cache coherency on booting CPU */
shmobile_scu_base_phys = scu_base_phys;
shmobile_scu_base = ioremap(scu_base_phys, PAGE_SIZE);
scu_enable(shmobile_scu_base);
scu_power_mode(shmobile_scu_base, SCU_PM_NORMAL);

3
arch/arm/mach-shmobile/smp-emev2.c
View File

@ -45,8 +45,7 @@ static void __init emev2_smp_prepare_cpus(unsigned int max_cpus)
}
/* setup EMEV2 specific SCU bits */
shmobile_scu_base = ioremap(EMEV2_SCU_BASE, PAGE_SIZE);
shmobile_smp_scu_prepare_cpus(max_cpus);
shmobile_smp_scu_prepare_cpus(EMEV2_SCU_BASE, max_cpus);
}
const struct smp_operations emev2_smp_ops __initconst = {

3
arch/arm/mach-shmobile/smp-r8a7779.c
View File

@ -94,8 +94,7 @@ static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus)
__raw_writel(__pa(shmobile_boot_vector), AVECR);
/* setup r8a7779 specific SCU bits */
shmobile_scu_base = IOMEM(R8A7779_SCU_BASE);
shmobile_smp_scu_prepare_cpus(max_cpus);
shmobile_smp_scu_prepare_cpus(R8A7779_SCU_BASE, max_cpus);
r8a7779_pm_init();

3
arch/arm/mach-shmobile/smp-sh73a0.c
View File

@ -52,8 +52,7 @@ static void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus)
__raw_writel(__pa(shmobile_boot_vector), SBAR);
/* setup sh73a0 specific SCU bits */
shmobile_scu_base = IOMEM(SH73A0_SCU_BASE);
shmobile_smp_scu_prepare_cpus(max_cpus);
shmobile_smp_scu_prepare_cpus(SH73A0_SCU_BASE, max_cpus);
}
const struct smp_operations sh73a0_smp_ops __initconst = {